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公开(公告)号：US20190020356A1
公开(公告)日：2019-01-17
申请号：US16134311
申请日：2018-09-18
申请人： INPHI CORPORATION
CPC分类号： H03M13/2778 , H03M13/2707 , H03M13/271 , H03M13/2742 , H03M13/2757 , H03M13/2767 , H03M13/2782 , H03M13/6502 , H04L1/0071
摘要： Multiple data permutation operations in respective different dimensions are used to provide an overall effective data permutation using smaller blocks of data in each permutation than would be used in directly implementing the overall permutation in a single permutation operation. Data that has been permuted in one permutation operation is block interleaved, and the interleaved data is then permuted in a subsequent permutation operation. A matrix transpose is one example of block interleaving that could be applied between permutation operations.
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2.发明授权公开(公告)号：US10063257B1
公开(公告)日：2018-08-28
申请号：US15154165
申请日：2016-05-13
发明人： Yiming Chen
CPC分类号： H03M13/1111 , G11B5/59616 , G11B2020/1863 , H03M13/1102 , H03M13/27 , H03M13/2742 , H03M13/2757 , H03M13/356 , H03M13/6325
摘要： A data storage device is disclosed comprising a storage medium. First data is encoded into a first codeword comprising a plurality of i-bit symbols, and second data is encoded into a second codeword comprising a plurality of j-bit symbols, wherein i is different than j and a first code rate of the first codeword is less than a second code rate of the second codeword. The first codeword and the second codeword are symbol interleaved to generate an interleaved codeword, and the interleaved codeword is written to the storage medium.
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公开(公告)号：US20170331656A1
公开(公告)日：2017-11-16
申请号：US15664918
申请日：2017-07-31
申请人： SATURN LICENSING LLC
CPC分类号： H04L27/2602 , H03M13/2742 , H03M13/6552 , H04L1/0057 , H04L1/0071 , H04L5/0007 , H04L5/0044 , H04L5/0048 , H04L27/2601 , H04L27/2626 , H04L27/2646
摘要： A data processing apparatus maps input symbols to be communicated onto a predetermined number of sub-carrier signals of an Orthogonal Frequency Division Multiplexed (OFDM) symbol. The data processor includes an interleaver memory which reads-in the predetermined number of data symbols for mapping onto the OFDM sub-carrier signals. The interleaver memory reads-out the data symbols on to the OFDM sub-carriers to effect the mapping, the read-out being in a different order than the read-in, the order being determined from a set of addresses, with the effect that the data symbols are interleaved on to the sub-carrier signals. The set of addresses are generated from an address generator which comprises a linear feedback shift register and a permutation circuit.
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公开(公告)号：US09819443B2
公开(公告)日：2017-11-14
申请号：US13452945
申请日：2012-04-23
申请人： Doron Rainish , Ilan Saul Barak , Raz Shani
发明人： Doron Rainish , Ilan Saul Barak , Raz Shani
CPC分类号： H04L1/0041 , H03M13/1102 , H03M13/1515 , H03M13/2707 , H03M13/2732 , H03M13/2742 , H03M13/29 , H03M13/2957 , H03M13/6306 , H03M13/6356 , H03M13/6362 , H04L1/0045 , H04L1/007 , H04L1/0071 , H04L2001/0093 , H04N19/89
摘要： A method for communication includes encoding data using at least one Error Correction Code (ECC) to generate first and second output data streams. The first output data stream is processed to generate a first output signal, which has a first acquisition time. The second output data stream is processed to generate a second output signal, which has a second acquisition time that is smaller than the first acquisition time. The first and second output signals are transmitted simultaneously over a communication channel.
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公开(公告)号：US20170317867A1
公开(公告)日：2017-11-02
申请号：US15654329
申请日：2017-07-19
申请人： LG Electronics Inc.
发明人： Jongseob Baek , Jongwoong Shin , Jaehyung Kim , Woosuk Ko , Sungryong Hong
CPC分类号： H04L27/2602 , H03M13/09 , H03M13/1102 , H03M13/152 , H03M13/255 , H03M13/27 , H03M13/271 , H03M13/2742 , H03M13/2778 , H03M13/2906 , H04L1/0041 , H04L1/0045 , H04L1/0071 , H04L1/0083 , H04L5/0053 , H04L27/2605 , H04L27/2626 , H04L27/2627 , H04L27/2634 , H04L27/265 , H04L2001/0093
摘要： A method and an apparatus for transmitting broadcast signals thereof are disclosed. The apparatus for transmitting broadcast signals comprises an encoder for encoding service data, a mapper for mapping the encoded service data into a plurality of OFDM (Orthogonal Frequency Division Multiplex) symbols to build at least one signal frame, a frequency interleaver for frequency interleaving data in the at least one signal frame by using a different interleaving-seed which is used for every OFDM symbol pair comprised of two sequential OFDM symbols, a modulator for modulating the frequency interleaved data by an OFDM scheme and a transmitter for transmitting the broadcast signals having the modulated data, wherein the different interleaving-seed is generated based on a cyclic shifting value and wherein an interleaving seed is variable based on an FFT size of the modulating.
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公开(公告)号：US20170093436A1
公开(公告)日：2017-03-30
申请号：US15378904
申请日：2016-12-14
CPC分类号： H03M13/2778 , H03M13/2707 , H03M13/271 , H03M13/2742 , H03M13/2757 , H03M13/2767 , H03M13/2782 , H03M13/6502 , H04L1/0071
摘要： Multiple data permutation operations in respective different dimensions are used to provide an overall effective data permutation using smaller blocks of data in each permutation than would be used in directly implementing the overall permutation in a single permutation operation. Data that has been permuted in one permutation operation is block interleaved, and the interleaved data is then permuted in a subsequent permutation operation. A matrix transpose is one example of block interleaving that could be applied between permutation operations.
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公开(公告)号：US09300515B2
公开(公告)日：2016-03-29
申请号：US14788176
申请日：2015-06-30
申请人： SONY CORPORATION
CPC分类号： H04L27/2602 , H03M13/2742 , H03M13/6552 , H04L1/0057 , H04L1/0071 , H04L5/0007 , H04L5/0044 , H04L5/0048 , H04L27/2601 , H04L27/2626 , H04L27/2646
摘要： A data processing apparatus maps input symbols to be communicated onto a predetermined number of sub-carrier signals of an Orthogonal Frequency Division Multiplexed (OFDM) symbol. The data processor includes an interleaver memory which reads-in the predetermined number of data symbols for mapping onto the OFDM sub-carrier signals. The interleaver memory reads-out the data symbols on to the OFDM sub-carriers to effect the mapping, the read-out being in a different order than the read-in, the order being determined from a set of addresses, with the effect that the data symbols are interleaved on to the sub-carrier signals. The set of addresses are generated from an address generator which comprises a linear feedback shift register and a permutation circuit.
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公开(公告)号：US20150304147A1
公开(公告)日：2015-10-22
申请号：US14788176
申请日：2015-06-30
申请人： SONY CORPORATION
CPC分类号： H04L27/2602 , H03M13/2742 , H03M13/6552 , H04L1/0057 , H04L1/0071 , H04L5/0007 , H04L5/0044 , H04L5/0048 , H04L27/2601 , H04L27/2626 , H04L27/2646
摘要： A data processing apparatus maps input symbols to be communicated onto a predetermined number of sub-carrier signals of an Orthogonal Frequency Division Multiplexed (OFDM) symbol. The data processor includes an interleaver memory which reads-in the predetermined number of data symbols for mapping onto the OFDM sub-carrier signals. The interleaver memory reads-out the data symbols on to the OFDM sub-carriers to effect the mapping, the read-out being in a different order than the read-in, the order being determined from a set of addresses, with the effect that the data symbols are interleaved on to the sub-carrier signals. The set of addresses are generated from an address generator which comprises a linear feedback shift register and a permutation circuit.
摘要翻译： 数据处理装置将要传送的输入符号映射到正交频分复用（OFDM）符号的预定数量的副载波信号。 数据处理器包括交织器存储器，其读入预定数量的数据符号以映射到OFDM子载波信号上。 交织器存储器将数据符号读出到OFDM子载波上以实现映射，读出的顺序与读入不同，顺序是从一组地址确定的，其效果是 数据符号被交织在子载波信号上。 地址集合由包括线性反馈移位寄存器和置换电路的地址发生器产生。
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公开(公告)号：US09118350B2
公开(公告)日：2015-08-25
申请号：US13987515
申请日：2013-08-02
IPC分类号： H03M13/00 , H03M13/29 , H03M13/25 , H03M13/27 , H03M13/37 , H03M13/09 , H03M13/11 , H03M13/41
CPC分类号： H03M13/2909 , H03M13/098 , H03M13/1102 , H03M13/1154 , H03M13/253 , H03M13/256 , H03M13/271 , H03M13/2742 , H03M13/2906 , H03M13/2918 , H03M13/2927 , H03M13/2933 , H03M13/2945 , H03M13/2948 , H03M13/3746 , H03M13/4115 , H03M13/6331
摘要： Serially-concatenated codes are formed in accordance with the present invention using a constrained interleaver. The constrained interleaver cause the minimum distance of the serial concatenated code to increase above the minimum distance of the inner code alone by adding a constraint that forces some or all of the distance of the outer code onto the serially-concatenated code. This allows the serially-concatenated code to be jointly optimized in terms of both minimum distance and error coefficient to provide significant performance advantages. Constrained interleaving can be summarized in that it: 1) uses an outer code that is a block code or a non-recursive convolutional code, and as such, there are multiple codewords present in the constrained interleaver, 2) selects a desired MHD, 3) selects an interleaver size and a set of predefined interleaver constraints to prevent undesired (low-distance) error events so as to achieve the desired MHD, and 4) performs uniform interleaving among the allowable (non-constrained) positions, to thereby maximize or otherwise improve the interleaver gain subject to the constraints imposed to maintain the desired MHD.
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公开(公告)号：US09116826B2
公开(公告)日：2015-08-25
申请号：US13987517
申请日：2013-08-02
CPC分类号： G06F11/10 , G06F11/1048 , H03M13/271 , H03M13/2742 , H03M13/29 , H03M13/2906 , H03M13/2933 , H03M13/2939 , H03M13/2972 , H03M13/3746 , H03M13/4115 , H03M13/6362
摘要： Serially-concatenated codes are formed in accordance with the present invention using a constrained interleaver. The constrained interleaver cause the minimum distance of the serial concatenated code to increase above the minimum distance of the inner code alone by adding a constraint that forces some or all of the distance of the outer code onto the serially-concatenated code. This allows the serially-concatenated code to be jointly optimized in terms of both minimum distance and error coefficient to provide significant performance advantages. These performance advantages allow a noise margin target to be achieved using simpler component codes and a much shorter interleaver than was needed when using prior art codes such as Turbo codes. Decoders are also provided. Both encoding and decoding complexity can be lowered, and interleavers can be made much shorter, thereby shortening the block lengths needed in receiver elements such as equalizers and other decision-directed loops. Also, other advantages are provided such as the elimination of a error floor present in prior art serially-concatenated codes. That allows the present invention to achieve much higher performance at lower error rates such as are needed in optical communication systems.
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