摘要:
A control signal generation method of integrated gate driver circuit includes the steps of: providing one gate control signal to an integrated gate driver circuit; and generating a plurality of internal control signals by the integrated gate driver circuit according to on the gate control signal to control internal operations of the integrated gate driver circuit. Furthermore, an integrated gate driver circuit is adapted to receive one external gate control signal. The integrated gate driver circuit includes an internal control signal generation circuit for generating a plurality of internal control signals according to the external gate control signal to control internal operations of the integrated gate driver circuit. In addition, a liquid crystal display device using the above-mentioned integrated gate driver circuit also is provided.
摘要:
A control signal generation method of integrated gate driver circuit includes the steps of: providing one gate control signal to an integrated gate driver circuit; and generating a plurality of internal control signals by the integrated gate driver circuit according to on the gate control signal to control internal operations of the integrated gate driver circuit. Furthermore, an integrated gate driver circuit is adapted to receive one external gate control signal. The integrated gate driver circuit includes an internal control signal generation circuit for generating a plurality of internal control signals according to the external gate control signal to control internal operations of the integrated gate driver circuit. In addition, a liquid crystal display device using the above-mentioned integrated gate driver circuit also is provided.
摘要:
A driving apparatus for a liquid crystal display (LCD) is provided. The driving apparatus includes a plurality of data driving ICs and a control board. The data driving ICs are used for receiving and transmitting a clock signal, a plurality of data signals and a first reference voltage from the 1st data driving IC to the last data driving IC in series. The control board is used for providing the clock signal, the data signals and the first reference voltage, and changing the first reference voltage received by each data driving IC according to a variation of the clock signal and the data signals transmitted between the data driving ICs, so that the operation frequency of the data driving ICs is unrestricted.
摘要:
A driving apparatus for a liquid crystal display (LCD) is provided. The driving apparatus includes a plurality of data driving ICs and a control board. The data driving ICs are used for receiving and transmitting a clock signal, a plurality of data signals and a first reference voltage from the 1st data driving IC to the last data driving IC in series. The control board is used for providing the clock signal, the data signals and the first reference voltage, and changing the first reference voltage received by each data driving IC according to a variation of the clock signal and the data signals transmitted between the data driving ICs, so that the operation frequency of the data driving ICs is unrestricted.
摘要:
A display is provided. The display includes a first timing controller, a second timing controller and drivers. The first timing controller receives and transmits a first portion of pixel values, in which the first portion of the pixel values includes the pixel values of at least two non-adjacent pixels. The second timing controller receives and transmits a second portion of the pixel values, in which the second portion of the pixel values includes the pixel values of at least two non-adjacent pixels. Each of the drivers receives respectively a part of the first portion of the pixel values transmitted by the first timing controller and a part of the second portion of the pixel values transmitted by the second timing controller. A method of transmitting image data in the display is also disclosed.
摘要:
A display is provided. The display includes a first timing controller, a second timing controller and drivers. The first timing controller receives and transmits a first portion of pixel values, in which the first portion of the pixel values includes the pixel values of at least two non-adjacent pixels. The second timing controller receives and transmits a second portion of the pixel values, in which the second portion of the pixel values includes the pixel values of at least two non-adjacent pixels. Each of the drivers receives respectively a part of the first portion of the pixel values transmitted by the first timing controller and a part of the second portion of the pixel values transmitted by the second timing controller. A method of transmitting image data in the display is also disclosed.
摘要:
A driving circuit includes a power supply, a plurality of conductive paths and a plurality of driving controller. The power supply is configured for providing a predetermined voltage. The conductive paths are connected to the power supply to receive the predetermined voltage. The driving controllers are connected to the conductive paths correspondingly. A first driving controller of the driving controllers has a first internal circuit configured for employing an internal voltage to perform functions provided by the first driving controller, and a resistance adjustment unit. The resistance adjustment unit is connected between a special conductive path and the first internal circuit. The second driving controller has a second internal circuit configured for employing a second internal voltage to perform functions provided by the second driving controller. A resistance value of the resistance adjustment unit is adjustable to make the first internal voltage same to the second internal voltage.
摘要:
A driving circuit includes a power supply, a plurality of conductive paths and a plurality of driving controller. The power supply is configured for providing a predetermined voltage. The conductive paths are connected to the power supply to receive the predetermined voltage. The driving controllers are connected to the conductive paths correspondingly. A first driving controller of the driving controllers has a first internal circuit configured for employing an internal voltage to perform functions provided by the first driving controller, and a resistance adjustment unit. The resistance adjustment unit is connected between a special conductive path and the first internal circuit. The second driving controller has a second internal circuit configured for employing a second internal voltage to perform functions provided by the second driving controller. A resistance value of the resistance adjustment unit is adjustable to make the first internal voltage same to the second internal voltage.
摘要:
A display IC chip includes a plurality of sides, a plurality of output terminals, two first color short-circuit lines, one second color short-circuit line, one third color short-circuit line, and conductive wires. The two first color short-circuit lines are parallel disposed in the IC chip and coupled to a first output terminal group of the output terminals. The second color short-circuit line is disposed between and parallel with the first color short-circuit lines. The second color short-circuit line is coupled to a second output terminal group of the output terminals. The third color short-circuit line is disposed between and parallel with the first color short-circuit lines. The third color short-circuit line is coupled to a third output terminal group of the output terminals. The conductive wires are coupled the first color short-circuit lines with the first output terminal group do not cross the second and third color short-circuit lines.
摘要:
The present invention in one aspect relates to a source driver comprising a first digital-to-analog converter with a positive polarity (PDAC), a second digital-to-analog converter with a negative polarity (NDAC), a first operational amplifier and a second operational amplifier. Each operational amplifier is characterized with a 1st & 2nd stage and an output stage. Both the PDAC and NDAC are coupled to the first and second operational amplifiers through a first pair of switches. The 1st & 2nd and output stages of the first operational amplifier are coupled to the 1st & 2nd and output stages of the second operational amplifier through a second pair of switches. The first and second operational amplifiers are coupled to odd data lines and even data line through a third pair of switches. Further, the amplitudes of the operational voltages for the PDAC, the NDAC and the output stages first and second operational amplifiers are set to be between the supply voltage and the ground voltage. Accordingly, the power consumption and the operational temperature are substantially reduced.