公开(公告)号：US20240274587A1

公开(公告)日：2024-08-15

申请号：US18401185

申请日：2023-12-29

Applicant: Meta Platforms Technologies, LLC

Inventor： Rajendra D. Pendse ,  Ronald Ho ,  Maryam Rahimi ,  Janani Chandrasekhar ,  Jaesik Lee ,  Aswani Kurra

IPC: H01L25/10 ,  H01L23/00 ,  H01L23/538 ,  H01L25/00 ,  H01L25/16 ,  H10B80/00

CPC classification number: H01L25/105 ,  H01L23/5383 ,  H01L24/16 ,  H01L25/16 ,  H01L25/50 ,  H10B80/00 ,  H01L2224/16225

Abstract: A circuit assembly may include a first sub-package a first chiplet including an active frontside that includes active circuitry and faces in a first direction, a second sub-package including a second chiplet including an active frontside that includes active circuitry and faces in a second direction opposite the first direction, and a memory sub-package including a memory. The first sub-package, the second sub-package, and the memory sub-package may be arranged so as to overlap each other in the first direction. Various other devices, systems, and methods are also disclosed.