公开(公告)号：US20190065108A1

公开(公告)日：2019-02-28

申请号：US15693121

申请日：2017-08-31

申请人： Michael G. Miller ,  Kishore Kumar Muchherla ,  Harish Singidi ,  Sampath Ratnam ,  Renan Padilla ,  Gary F. Besinga ,  Peter Sean Feeley

发明人： Michael G. Miller ,  Kishore Kumar Muchherla ,  Harish Singidi ,  Sampath Ratnam ,  Renan Padilla ,  Gary F. Besinga ,  Peter Sean Feeley

IPC分类号： G06F3/06 ,  G11C16/10

CPC分类号： G06F3/0659 ,  G06F3/0619 ,  G06F3/0679 ,  G11C5/144 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/30 ,  G11C16/3459

摘要： Devices and techniques for correcting for power loss in NAND memory devices are disclosed herein. The NAND memory devices may comprise a number of physical pages. For example, a memory controller may detect a power loss indicator at the NAND flash memory. The memory controller may identify a last-written physical page and determine whether the last-written physical page comprises more than a threshold number of low-read-margin cells. If the last-written physical page comprises more than the threshold number of low-read-margin cells, the memory controller may provide a programming voltage to at least the low-read-margin cells.