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1.发明授权Snooping-based cache-coherence filter for a point-to-point connected multiprocessing node 有权用于点对点连接多处理节点的基于Snooping的缓存相干过滤器公开(公告)号：US07698509B1
公开(公告)日：2010-04-13
申请号：US10889952
申请日：2004-07-13
IPC分类号： G06F12/00
CPC分类号： G06F12/0831 , G06F12/0813
摘要： A multiprocessing node has a plurality of point-to-point connected microprocessors. Each of the microprocessors is also point-to-point connected to a filter. In response to a local cache miss, a microprocessor issues a broadcast for the requested data to the filter. The filter, using memory that stores a copy of the tags of data stored in the local cache memories of each of the microprocessors, relays the broadcast to those/microprocessors having copies of the requested data. If the snoop filter memory indicates that none of the microprocessors have a copy of the requested data, the snoop filter may either (i) cancel the broadcast and issue a message back to the requesting microprocessor, or (ii) relay the broadcast to a connected multiprocessing node.
摘要翻译： 多处理节点具有多个点到点连接的微处理器。 每个微处理器也是点对点连接到过滤器。 响应于本地高速缓存未命中，微处理器向所述过滤器发出所请求数据的广播。 使用存储存储在每个微处理器的本地高速缓冲存储器中的数据的标签的副本的存储器的过滤器将广播中继到具有所请求数据的副本的那些微处理器。 如果窥探过滤器存储器指示没有一个微处理器具有所请求的数据的副本，则窥探过滤器可以（i）取消广播并将消息发回给请求的微处理器，或者（ii）将广播中继到所连接的 多处理节点。
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公开(公告)号：US07856421B2
公开(公告)日：2010-12-21
申请号：US11750664
申请日：2007-05-18
IPC分类号： G06F7/00
CPC分类号： G06F11/1666 , G06F11/141 , G06F11/1482 , G06F11/1658 , G06F11/202 , G06F11/2043 , G06F11/2097 , G06F12/0804
摘要： A method and system for increasing reliability and availability of a multi-processor network. A system includes a network with at least two nodes, with each node comprising a multi-processor unit (mpu) and memory. The mpu includes one or more processors and a wiretap unit. The wiretap unit and the memory included in the node are coupled to the processors in the node. The wiretap unit is configured to monitor memory accesses of the processors and convey data indicative of such accesses to a second node. The second node maintains a replica of memory in the first node, and is configured to undo modifications to the memory if needed. In the event of a hardware or software fault, the nodes are configured to restart the application on another node.
摘要翻译： 一种用于提高多处理器网络的可靠性和可用性的方法和系统。 系统包括具有至少两个节点的网络，其中每个节点包括多处理器单元（mpu）和存储器。 mpu包括一个或多个处理器和窃听单元。 包括在节点中的窃听器单元和存储器耦合到节点中的处理器。 窃听器单元被配置为监视处理器的存储器访问并将指示这种访问的数据传送到第二节点。 第二节点在第一节点中维护存储器的副本，并且被配置为在需要时撤销对存储器的修改。 在硬件或软件故障的情况下，节点被配置为在另一个节点上重新启动应用程序。
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3.发明授权Bandwidth reduction technique in a snooping-based cache-coherent cluster of multiprocessing nodes 有权基于Snooping的多处理节点缓存一致性集群中的带宽减少技术公开(公告)号：US07315919B1
公开(公告)日：2008-01-01
申请号：US10868053
申请日：2004-06-15
IPC分类号： G06F12/00
CPC分类号： G06F12/0833 , G06F12/0813 , G06F12/0817
摘要： A cluster of multiprocessing nodes uses snooping-based cache-coherence to maintain consistency among the cache memories of the multiprocessing nodes. One or more of the multiprocessing nodes each maintain a directory table that includes a list of addresses of data last transferred by cache-to-cache transfer transactions. Thus, upon a local cache miss for requested data, a multiprocessing node searches its directory table for an address of the requested data, and if the address is found in the directory table, the multiprocessing node obtains a copy of the requested data from the last destination of the requested data as indicated in the directory table. Thereafter, a message indicating the completion of a cache-to-cache transfer is broadcast to other connected multiprocessing nodes on a “best efforts” basis in which messages are relayed from multiprocessing node to multiprocessing node using low priority status and/or otherwise unused cycles.
摘要翻译： 多处理节点的集群使用基于窥探的高速缓存相干性来保持多处理节点的高速缓冲存储器之间的一致性。 多处理节点中的一个或多个维护一个目录表，该目录表包括由缓存到高速缓存传输事务最后传送的数据的地址列表。 因此，在针对所请求的数据的本地高速缓存未命中时，多处理节点在其目录表中搜索所请求数据的地址，并且如果在目录表中找到地址，则多处理节点从最后一个获取所请求的数据的副本 请求数据的目的地，如目录表所示。 此后，在“尽力而为”的基础上向其他连接的多处理节点广播指示高速缓存到高速缓存传输的完成的消息，其中使用低优先级状态和/或未使用的周期将消息从多处理节点中继到多处理节点 。
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4.发明授权Conservative shadow cache support in a point-to-point connected multiprocessing node 有权在点对点连接的多处理节点中保守的影子缓存支持公开(公告)号：US07213106B1
公开(公告)日：2007-05-01
申请号：US10914373
申请日：2004-08-09
IPC分类号： G06F13/00
CPC分类号： G06F12/0833
摘要： A point-to-point connected multiprocessing node uses a snooping-based cache-coherence filter to selectively direct relays of data request broadcasts. The filter includes shadow cache lines that are maintained to hold copies of the local cache lines of integrated circuits connected to the filter. The shadow cache lines are provided with additional entries so that if newly referenced data is added to a particular local cache line by “silently” removing an entry in the local cache line, the newly referenced data may be added to the shadow cache line without forcing the “blind” removal of an entry in the shadow cache line.
摘要翻译： 点到点连接的多处理节点使用基于窥探的高速缓存相干滤波器来选择性地指导数据请求广播的中继。 该过滤器包括保存为保持连接到过滤器的集成电路的本地高速缓存行的副本的影子高速缓存行。 阴影缓存线具有附加条目，以便如果通过“静默地”删除本地高速缓存行中的条目将新引用的数据添加到特定本地高速缓存行，则可以将新引用的数据添加到阴影高速缓存行而不强制 “盲目”删除影子缓存行中的条目。
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5.发明授权Cache protocol enhancements in a proximity communication-based off-chip cache memory architecture 有权基于接近通信的片外高速缓存存储器架构中的缓存协议增强公开(公告)号：US07562190B1
公开(公告)日：2009-07-14
申请号：US11156332
申请日：2005-06-17
IPC分类号： G06F12/00
CPC分类号： G06F12/0804 , G06F12/0831
摘要： A proximity interconnect module includes a plurality of processors operatively connected to a plurality of off-chip cache memories by proximity communication. Due to the high bandwidth capability of proximity interconnect, enhancements to the cache protocol to improve latency may be made despite resulting increased bandwidth consumption.
摘要翻译： 近程互连模块包括通过邻近通信可操作地连接到多个片外高速缓冲存储器的多个处理器。 由于接近互连的高带宽能力，尽管导致增加的带宽消耗，仍然可以对缓存协议进行增强以改善延迟。
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6.发明授权Bandwidth reduction technique using cache-to-cache transfer prediction in a snooping-based cache-coherent cluster of multiprocessing nodes 有权在基于窥探的多处理节点的高速缓存一致性集群中使用高速缓存到高速缓存传输预测的带宽减少技术公开(公告)号：US07174430B1
公开(公告)日：2007-02-06
申请号：US10889953
申请日：2004-07-13
IPC分类号： G06F12/00
CPC分类号： G06F12/0831 , G06F12/0813 , G06F12/0833 , G06F2212/1048 , G06F2212/507
摘要： A multiprocessing node in a snooping-based cache-coherent cluster of processing nodes maintains a cache-to-cache transfer prediction directory of addresses of data last transferred by cache-to-cache transfers. In response to a local cache miss, the multiprocessing node may use the cache-to-cache transfer prediction directory to predict a cache-to-cache transfer and issue a restricted broadcast for requested data that allows only cache memories in the cluster to return copies of the requested data to the requesting multiprocessing node, thereby reducing the consumption of bandwidth that would otherwise be consumed by having a home memory return a copy of the requested data in response to an unrestricted broadcast for requested data that allows cache memories and home memories in a cluster to return copies of the requested data to the requesting multiprocessing node.
摘要翻译： 基于窥探的高速缓存一致的处理节点群集中的多处理节点维护由缓存到高速缓存传输最后传输的数据地址的高速缓存到缓存传输预测目录。 响应于本地高速缓存未命中，多处理节点可以使用高速缓存到高速缓存传输预测目录来预测高速缓存到高速缓存传输，并且发出仅允许集群中的高速缓存存储器返回副本的所请求数据的受限广播 所请求的数据被发送到请求的多处理节点，从而通过使家庭存储器响应于允许高速缓存存储器和家庭存储器的所请求的数据的无限制广播来返回所请求的数据的副本而减少否则将消耗的带宽的消耗 将请求的数据的副本返回到请求的多处理节点的集群。
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公开(公告)号：US08151057B1
公开(公告)日：2012-04-03
申请号：US10891594
申请日：2004-07-15
IPC分类号： G06F12/00
CPC分类号： G06F12/0833
摘要： A shared cache is point-to-point connected to a plurality of point-to-point connected processing nodes, wherein the processing nodes may be integrated circuits or multiprocessing systems. In response to a local cache miss, a requesting processing node issues a broadcast for requested data which is observed by the shared cache. If the shared cache has a copy of the requested data, the shared cache forwards the copy of the requested data to the requesting processing node.
摘要翻译： 共享缓存是点对点连接到多个点对点连接的处理节点，其中处理节点可以是集成电路或多处理系统。 响应于本地高速缓存未命中，请求处理节点发出由共享高速缓存所观察到的请求数据的广播。 如果共享缓存具有所请求数据的副本，则共享缓存将所请求数据的副本转发到请求处理节点。
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公开(公告)号：US08396937B1
公开(公告)日：2013-03-12
申请号：US11742106
申请日：2007-04-30
IPC分类号： G06F15/167 , G06F13/00 , G06F13/28
CPC分类号： G06F13/28
摘要： A method and system for increasing programmability and scalability of a multi-processor network. A system includes two or more nodes coupled via a network with each node comprising a processor unit and memory. The processor unit includes one or more processors and a wiretap unit. The wiretap unit is configured to monitor memory accesses of the processors. A transaction may execute a number of read and/or write operations to memory. The nodes are configured to replicate one or more portions of memory; detect data conflicts to memory; and restore memory to pre-transaction state if needed.
摘要翻译： 一种用于提高多处理器网络的可编程性和可扩展性的方法和系统。 系统包括经由网络耦合的两个或更多个节点，每个节点包括处理器单元和存储器。 处理器单元包括一个或多个处理器和窃听器单元。 窃听器单元被配置为监视处理器的存储器访问。 事务可以对存储器执行多个读取和/或写入操作。 节点被配置为复制存储器的一个或多个部分; 检测数据冲突到内存; 并在需要时将内存还原到事务前状态。
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公开(公告)号：US07496712B1
公开(公告)日：2009-02-24
申请号：US11155375
申请日：2005-06-17
IPC分类号： G06F12/00
CPC分类号： G06F15/7846
摘要： A proximity interconnect module includes a plurality of off-chip cache memories. Either disposed external to the proximity interconnect module or on the proximity interconnect module are a plurality of processors that are dependent on the plurality of off-chip cache memories for servicing requests for data. The plurality of off-chip cache memories are operatively connected to either one another or to one or more of the plurality of processors by proximity communication. Each of the plurality of off-chip cache memories may cache certain portions of the physical address space.
摘要翻译： 邻近互连模块包括多个片外高速缓存存储器。 设置在邻近互连模块外部或邻近互连模块上的是处理器，其依赖于用于服务数据请求的多个片外缓存存储器。 多个片外高速缓存存储器通过邻近通信可操作地连接到多个处理器中的一个或多个。 多个片外高速缓存存储器中的每一个可以缓存物理地址空间的某些部分。
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公开(公告)号：US20080288556A1
公开(公告)日：2008-11-20
申请号：US11750664
申请日：2007-05-18
IPC分类号： G06F12/16 , G06F15/167
CPC分类号： G06F11/1666 , G06F11/141 , G06F11/1482 , G06F11/1658 , G06F11/202 , G06F11/2043 , G06F11/2097 , G06F12/0804
摘要： A method and system for increasing reliability and availability of a multi-processor network. A system includes a network with at least two nodes, with each node comprising a multi-processor unit (mpu) and memory. The mpu includes one or more processors and a wiretap unit. The wiretap unit and the memory included in the node are coupled to the processors in the node. The wiretap unit is configured to monitor memory accesses of the processors and convey data indicative of such accesses to a second node. The second node maintains a replica of memory in the first node, and is configured to undo modifications to the memory if needed. In the event of a hardware or software fault, the nodes are configured to restart the application on another node.
摘要翻译： 一种用于提高多处理器网络的可靠性和可用性的方法和系统。 系统包括具有至少两个节点的网络，其中每个节点包括多处理器单元（mpu）和存储器。 mpu包括一个或多个处理器和窃听单元。 包括在节点中的窃听器单元和存储器耦合到节点中的处理器。 窃听器单元被配置为监视处理器的存储器访问并将指示这种访问的数据传送到第二节点。 第二节点在第一节点中维护存储器的副本，并且被配置为在需要时撤销对存储器的修改。 在硬件或软件故障的情况下，节点被配置为在另一个节点上重新启动应用程序。
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