公开(公告)号：US09582275B2

公开(公告)日：2017-02-28

申请号：US13118766

申请日：2011-05-31

申请人： Michael W. Chynoweth ,  Peggy J. Irelan ,  Matthew C. Merten ,  Seung-Woo Kim ,  Laura A. Knauth ,  Stanislav Bratanov

发明人： Michael W. Chynoweth ,  Peggy J. Irelan ,  Matthew C. Merten ,  Seung-Woo Kim ,  Laura A. Knauth ,  Stanislav Bratanov

IPC分类号： G06F15/00 ,  G06F7/38 ,  G06F9/00 ,  G06F9/44 ,  G06F9/30 ,  G06F11/34

CPC分类号： G06F9/30058 ,  G06F9/30054 ,  G06F9/30087 ,  G06F9/30101 ,  G06F9/3016 ,  G06F11/3409 ,  G06F11/3476 ,  G06F11/348 ,  G06F12/0875

摘要： In one embodiment, a processor includes a performance monitor including a last branch record (LBR) stack to store a call stack to an event of interest, where the call stack is collected responsive to a trigger for the event. The processor further includes logic to control the LBR stack to operate in a call stack mode such that an entry to a call instruction for a leaf function is cleared on return from the leaf function. Other embodiments are described and claimed.

摘要翻译： 在一个实施例中，处理器包括性能监视器，其包括最后一个分支记录（LBR）堆栈，以将呼叫堆栈存储到感兴趣的事件，响应于该事件的触发来收集呼叫栈。 处理器还包括控制LBR堆栈以调用堆栈模式操作的逻辑，使得从叶片功能返回时清除叶子功能的调用指令的条目。 描述和要求保护其他实施例。

公开(公告)号：US20120311307A1

公开(公告)日：2012-12-06

申请号：US13118766

申请日：2011-05-31

申请人： Michael W. Chynoweth ,  Peggy J. Irelan ,  Matthew C. Merten ,  Seung-Woo Kim ,  Laura A. Knauth ,  Stanislav Bratanov

发明人： Michael W. Chynoweth ,  Peggy J. Irelan ,  Matthew C. Merten ,  Seung-Woo Kim ,  Laura A. Knauth ,  Stanislav Bratanov

IPC分类号： G06F9/38

CPC分类号： G06F9/30058 ,  G06F9/30054 ,  G06F9/30087 ,  G06F9/30101 ,  G06F9/3016 ,  G06F11/3409 ,  G06F11/3476 ,  G06F11/348 ,  G06F12/0875

摘要： In one embodiment, a processor includes a performance monitor including a last branch record (LBR) stack to store a call stack to an event of interest, where the call stack is collected responsive to a trigger for the event. The processor further includes logic to control the LBR stack to operate in a call stack mode such that an entry to a call instruction for a leaf function is cleared on return from the leaf function. Other embodiments are described and claimed.

摘要翻译： 在一个实施例中，处理器包括性能监视器，其包括最后一个分支记录（LBR）堆栈，以将呼叫堆栈存储到感兴趣的事件，响应于该事件的触发来收集呼叫栈。 处理器还包括控制LBR堆栈以调用堆栈模式操作的逻辑，使得从叶片功能返回时清除叶子功能的调用指令的条目。 描述和要求保护其他实施例。

公开(公告)号：US20070109160A1

公开(公告)日：2007-05-17

申请号：US10566140

申请日：2003-07-29

申请人： Vadim Pisarevsky ,  Sergey Zheltov ,  Alexander Irhin ,  Stanislav Bratanov

发明人： Vadim Pisarevsky ,  Sergey Zheltov ,  Alexander Irhin ,  Stanislav Bratanov

IPC分类号： H03M7/40

CPC分类号： H03M7/42

摘要： Embodiments of the present invention perform efficient decoding of variable length codes statically defined by a coding standard for a wide range of source data. According to the disclosed method, special data structures (decoding tables) are created. A bit set size is associated with each decoding table. Each decoding table contains a decoded value, actual code length, reference to another table (from the set of created tables), and validity indicator for each bit combination that can be formed from the number of bits equal to the bit set size. An active decoding table is selected. Then the number of bits equal to the bit set size associated with the active decoding table is read from a bit stream. The active decoding table is indexed with the actual value of bits read to obtain the decoded value, actual code length, reference to another table, and validity indicator. The validity indicator is then checked to determine whether the decoded value obtained is valid. If the decoded value is indicated to be invalid, the decoding table that is referenced by the currently active table is selected to become active, and the decoding process continues. Otherwise, the bit steam is adjusted in accordance with the actual code length obtained and the hit set size associated with the decoding tables that were active during the decoding. The decoded value is then returned.

摘要翻译： 本发明的实施例对于广泛的源数据的编码标准进行静态定义的可变长度码的高效解码。 根据所公开的方法，创建特殊数据结构（解码表）。 位设置大小与每个解码表相关联。 每个解码表包含解码值，实际代码长度，对另一个表的引用（来自所创建的表的集合）以及可以从等于位组大小的位数形成的每个位组合的有效性指示符。 选择活动解码表。 然后，从比特流读取等于与活动解码表相关联的比特集大小的比特数。 活动解码表用读取的比特的实际值索引，以获得解码值，实际代码长度，对另一个表的引用和有效性指示符。 然后检查有效性指示符，以确定所获得的解码值是否有效。 如果解码值被指示为无效，则由当前活动表引用的解码表被选择为激活，并且解码过程继续进行。 否则，根据获得的实际代码长度和与在解码期间有效的解码表相关联的命中设置大小来调整位蒸汽。 然后返回解码的值。

公开(公告)号：US20060235648A1

公开(公告)日：2006-10-19

申请号：US10564568

申请日：2003-07-15

申请人： Sergey Zheltov ,  Stanislav Bratanov ,  Roman Belenov ,  Alexander Knyazev

发明人： Sergey Zheltov ,  Stanislav Bratanov ,  Roman Belenov ,  Alexander Knyazev

IPC分类号： G06F15/00

CPC分类号： G06F11/3404 ,  G06F11/3495 ,  G06F2201/865

摘要： Efficient performance monitoring for symmetric multi-threading systems is applicable to systems that have limited performance monitoring resources and enables efficient resource sharing on a per-execution unit basis. The performance monitoring unit being shared is programmed to reset its counter and to start performance monitoring operation if there is only one execution unit requesting this operation. In case there are several requests pending, an attempt is made to program the performance monitoring unit to collect performance data for a subset of execution units the hardware is capable to support. Upon a request to stop performance monitoring operation the previously allocated indicator may be removed, and the performance monitoring unit may be programmed to stop operating if there are no more active or pending requests. In case the performance monitoring was inactive for the current execution unit, this request may be discarded, and no performance data may be returned.

摘要翻译： 对称多线程系统的高效性能监控适用于具有有限性能监视资源并能够实现基于每个执行单元的高效资源共享的系统。 共享的性能监视单元被编程为重置其计数器，并且如果只有一个执行单元请求该操作，则启动性能监视操作。 如果有几个请求未决，则尝试对性能监视单元进行编程，以收集硬件能够支持的执行单元子集的性能数据。 在停止性能监视操作的请求时，可以去除先前分配的指示符，并且如果没有更多的活动或未决请求，则可以将性能监视单元编程为停止运行。 如果当前执行单元的性能监视不活动，则该请求可能会被丢弃，并且不会返回任何性能数据。

公开(公告)号：US20060187096A1

公开(公告)日：2006-08-24

申请号：US10564678

申请日：2003-07-15

申请人： Sergey Zheltov ,  Stanislav Bratanov

发明人： Sergey Zheltov ,  Stanislav Bratanov

IPC分类号： H03M7/40

CPC分类号： H03M7/42

摘要： The method disclosed may be used together with any prefix oriented decoding method to enable faster decoding of variable length codes when a subset of most frequently used codes with relatively short prefixes may be determined. An embodiment of the present invention reads a number of bits, not less than the maximal possible length of a code, from a bit stream. Then a predetermined number of bits is selected and used as an index to a data structure that contains at least a decoded value and a validity indicator, along with other pre-decoded data, namely: prefix type and length, maximal code length for a group of codes, actual code length, the number of bits to return to the bit stream, etc. The validity indicator is used to determine whether to proceed with the decoding operation, or obtain the valid decoded value from the data structure and return excess bits to the bit stream. If the decoded value is indicated to be invalid, the decoding operation is continued, and a decoding method that estimates the length of the code prefix and the number of significant bits corresponding to the length estimated is applied to the bits initially read from the bit stream.

摘要翻译： 所公开的方法可以与任何基于前缀的解码方法一起使用，以便当可以确定具有相对较短前缀的最常用的码的子集时，能够对可变长度码进行更快的解码。 本发明的实施例从比特流读取不少于代码的最大可能长度的位数。 然后，选择预定数量的比特并将其用作至少包含解码值和有效性指示符的数据结构的索引以及其他预解码数据，即：组的前缀类型和长度，最大码长度 的代码，实际代码长度，返回比特流的比特数等。有效性指示符用于确定是否进行解码操作，或从数据结构获得有效的解码值，并将多余的比特返回到 比特流。 如果解码的值被指示为无效，则继续解码操作，并且将估计码前缀的长度和与所估计的长度相对应的有效位的数量的解码方法应用于从比特流最初读取的比特 。

公开(公告)号：US20190310857A1

公开(公告)日：2019-10-10

申请号：US16433997

申请日：2019-06-06

申请人： Stanislav Bratanov

发明人： Stanislav Bratanov

IPC分类号： G06F9/38 ,  G06F9/50

摘要： Embodiments of the present invention provide for concurrent instruction execution in heterogeneous computer systems by forming a parallel execution context whenever a first software thread encounters a parallel execution construct. The parallel execution context may comprise a reference to instructions to be executed concurrently, a reference to data said instructions may depend on, and a parallelism level indicator whose value specifies the number of times said instructions are to be executed. The first software thread may then signal to other software threads to begin concurrent execution of instructions referenced in said context. Each software thread may then decrease the parallelism level indicator and copy data referenced in the parallel execution context to said thread's private memory location and modify said data to accommodate for the new location. Software threads may be executed by a processor and operate on behalf of other processing devices or remote computer systems.

公开(公告)号：US10248424B2

公开(公告)日：2019-04-02

申请号：US15283370

申请日：2016-10-01

申请人： Salmin Sultana ,  Stanislav Bratanov ,  David M. Durham ,  Beeman C. Strong

发明人： Salmin Sultana ,  Stanislav Bratanov ,  David M. Durham ,  Beeman C. Strong

IPC分类号： G06F9/44 ,  G06F9/38 ,  G06F11/36 ,  G06F9/30

摘要： One embodiment provides an apparatus. The apparatus includes collector circuitry to capture processor trace (PT) data from a PT driver. The PT data includes a first target instruction pointer (TIP) packet including a first runtime target address of an indirect branch instruction of an executing target application. The apparatus further includes decoder circuitry to extract the first TIP packet from the PT data and to decode the first TIP packet to yield the first runtime target address. The apparatus further includes control flow validator circuitry to determine whether a control flow transfer to the first runtime target address corresponds to a control flow violation based, at least in part, on a control flow graph (CFG). The CFG including a plurality of nodes, each node including a start address of a first basic block, an end address of the first basic block and a next possible address of a second basic block or a not found tag.

公开(公告)号：US07348902B2

公开(公告)日：2008-03-25

申请号：US10566140

申请日：2003-07-29

申请人： Vadim Pisarevsky ,  Sergey Zheltov ,  Alexander Irhin ,  Stanislav Bratanov

发明人： Vadim Pisarevsky ,  Sergey Zheltov ,  Alexander Irhin ,  Stanislav Bratanov

IPC分类号： H03M7/40

CPC分类号： H03M7/42

摘要： Embodiments of the present invention perform efficient decoding of variable length codes statically defined by a coding standard for a wide range of source data. According to the disclosed method, special data structures (decoding tables) are created. A bit set size is associated with each decoding table. Each decoding table contains a decoded value, actual code length, reference to another table (from the set of created tables), and validity indicator for each bit combination that can be formed from the number of bits equal to the bit set size. An active decoding table is selected. Then the number of bits equal to the bit set size associated with the active decoding table is read from a bit stream. The active decoding table is indexed with the actual value of bits read to obtain the decoded value, actual code length, reference to another table, and validity indicator. The validity indicator is then checked to determine whether the decoded value obtained is valid. If the decoded value is indicated to be invalid, the decoding table that is referenced by the currently active table is selected to become active, and the decoding process continues. Otherwise, the bit steam is adjusted in accordance with the actual code length obtained and the hit set size associated with the decoding tables that were active during the decoding. The decoded value is then returned.

摘要翻译： 本发明的实施例对于广泛的源数据的编码标准进行静态定义的可变长度码的高效解码。 根据所公开的方法，创建特殊数据结构（解码表）。 位设置大小与每个解码表相关联。 每个解码表包含解码值，实际代码长度，对另一个表的引用（来自所创建的表的集合）以及可以从等于位组大小的位数形成的每个位组合的有效性指示符。 选择活动解码表。 然后，从比特流读取等于与活动解码表相关联的比特集大小的比特数。 活动解码表用读取的比特的实际值索引，以获得解码值，实际代码长度，对另一个表的引用和有效性指示符。 然后检查有效性指示符，以确定所获得的解码值是否有效。 如果解码值被指示为无效，则由当前活动表引用的解码表被选择为激活，并且解码过程继续进行。 否则，根据获得的实际代码长度和与在解码期间有效的解码表相关联的命中设置大小来调整位蒸汽。 然后返回解码的值。