公开(公告)号：US07274268B2

公开(公告)日：2007-09-25

申请号：US10974192

申请日：2004-10-27

申请人： Michael W. Vice ,  Tiberiu Jamneala ,  Michael L. Frank

发明人： Michael W. Vice ,  Tiberiu Jamneala ,  Michael L. Frank

IPC分类号： H03H7/42

CPC分类号： H03H7/42

摘要： A balun including a pair of metal coil structures and an intervening dielectric layer having a thickness that is selected in response an operating frequency of the balun. The thickness of the dielectric layer may be used to tune the balun and enhance its self-inductance at its operating frequency. In addition, a balun with a pair of metal coil structures formed with an asymmetry that is selected to minimize an amplitude error in its output signal. A balun according the present teachings may also include an asymmetry in the positioning of its output terminals. The positioning of the output terminals of a balun may be adjusted to minimize phase errors at its output signal.

摘要翻译： 包括一对金属线圈结构的平衡 - 不平衡转换器和具有响应于平衡 - 不平衡变换器的工作频率选择的厚度的中间介电层。 电介质层的厚度可用于调整平衡 - 不平衡变换器，并在其工作频率下增强其自感。 另外，具有一对金属线圈结构的平衡 - 不平衡变换器被形成为具有不对称性，其被选择以使其输出信号中的幅度误差最小化。 根据本教导的平衡不平衡转换器还可以包括其输出端子的定位的不对称性。 可以调节平衡 - 不平衡变换器的输出端子的定位，以使其输出信号处的相位误差最小化。

公开(公告)号：US07286013B2

公开(公告)日：2007-10-23

申请号：US10667019

申请日：2003-09-18

申请人： Michael W. Vice

发明人： Michael W. Vice

IPC分类号： H03F3/45

CPC分类号： H03F3/45381 ,  H03F2203/45662 ,  H03F2203/45731

摘要： A differential amplifier that employs mutually coupled inductors to provide desired levels of inductance in a substantially smaller form factor in comparison to individual inductor components. Mutually coupled inductors according to the present teachings may also be used to increase common mode rejection in a differential amplifier.

摘要翻译： 一种差分放大器，其采用相互耦合的电感器，以与单独的电感器部件相比，以基本上更小的形状因子提供期望的电平水平。 根据本教导的互耦合电感器也可用于增加差分放大器中的共模抑制。

公开(公告)号：US5361409A

公开(公告)日：1994-11-01

申请号：US004234

申请日：1993-01-14

申请人： Michael W. Vice

发明人： Michael W. Vice

IPC分类号： H03D7/14 ,  H04B1/26

CPC分类号： H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03D7/1491 ,  H03D2200/0023 ,  H03D2200/0043 ,  H03D7/14

摘要： A mixer comprising four FET transistors in a MMIC, a reflection transformer having tri-filar windings, an IF balun, an RF balun, a local oscillator balun, a pair of load resistors, a pair of series resistors, and a pair of series capacitors. The mixer is packaged in a lidded header similar to a large TO-8 metal package.

摘要翻译： 一种混合器，包括MMIC中的四个FET晶体管，具有三线圈绕组的反射变压器，IF平衡 - 不平衡变换器，RF平衡 - 不平衡变换器，本地振荡器平衡 - 不平衡变换器，一对负载电阻器，一对串联电阻器和一对串联电容器 。 混合器包装在一个类似于大型TO-8金属包装的盖子头部。

公开(公告)号：US07570936B2

公开(公告)日：2009-08-04

申请号：US11588720

申请日：2006-10-27

申请人： Michael W. Vice

发明人： Michael W. Vice

IPC分类号： H04B1/26

CPC分类号： H03D7/125

摘要： A mixing circuit is described in connection with various embodiments.

摘要翻译： 结合各种实施例描述混合电路。

公开(公告)号：US07292093B2

公开(公告)日：2007-11-06

申请号：US10924699

申请日：2004-08-24

申请人： Michael W. Vice

发明人： Michael W. Vice

IPC分类号： H03D1/00

CPC分类号： G01R19/04

摘要： An envelope detector that does not generate an undesirable DC offset at its DC output signal. An envelope detector according to the present teachings includes a circuit for performing a DC level shift on an AC input signal applied to the envelope detector such that a magnitude of the DC level shift is proportional to a peak envelope of the AC input signal.

摘要翻译： 在其直流输出信号下不产生不期望的直流偏移的包络检测器。 根据本教导的包络检测器包括用于对施加到包络检测器的AC输入信号执行DC电平移位的电路，使得DC电平移位的幅度与AC输入信号的峰值包络成比例。

公开(公告)号：US5513390A

公开(公告)日：1996-04-30

申请号：US149671

申请日：1993-11-09

申请人： Michael W. Vice

发明人： Michael W. Vice

IPC分类号： H03D7/14 ,  H04B1/26

CPC分类号： H03D7/1441 ,  H03D7/1408 ,  H03D7/1491 ,  H03D2200/0023 ,  H03D2200/0043 ,  H03D7/14

摘要： A mixer including a "reflection" transmission line transformer having at least first and second ports. The ports are connected such that nearly complete coupling of energy between the ports relies on substantially complete reflection of energy at a reference plane of the transformer. In a preferred implementation there is produced at the first port an intermediate frequency (IF) signal and received a DC bias signal via an IF balun. At the second port there is inputted a radio frequency (RF) signal through an RF balun.The DC bias signal will preferably be provided to a set of phase-selecting GaAs MESFET transistors operatively connected between an LO balun and a third port of the reflection transformer. In the preferred implementation the MESFET transistors are realized using an MMIC.

摘要翻译： 包括具有至少第一和第二端口的“反射”传输线变压器的混频器。 这些端口被连接成使得端口之间几乎完全的能量耦合依赖于在变压器的参考平面上的能量的基本上完全的反射。 在优选的实施方式中，在第一端口产生中频（IF）信号，并通过IF平衡 - 不平衡变换器接收DC偏置信号。 在第二端口，通过RF平衡 - 不平衡变换器输入射频（RF）信号。 优选地，将DC偏置信号提供给可操作地连接在LO平衡 - 不平衡变换器和反射变压器的第三端口之间的一组相位选择GaAs MESFET晶体管。 在优选实施例中，MESFET晶体管使用MMIC实现。

公开(公告)号：US07619463B2

公开(公告)日：2009-11-17

申请号：US11060018

申请日：2005-02-17

申请人： Michael W. Vice

发明人： Michael W. Vice

IPC分类号： G11C5/14

CPC分类号： H03K17/063 ,  H03K17/302

摘要： A power down circuit that provides an on-state electrical current to a load circuit that does not depend significantly on power control signal logic levels and that provides a widened off-state control signal voltage range. A power down circuit according to the present teachings includes a switching transistor for providing an electrical current to a load circuit in an on-state and for interrupting the electrical current in an off-state and that includes a circuit for operating the switching transistor in a triode region during the on-state.

摘要翻译： 一种断电电路，其向负载电路提供导通状态电流，该负载电路不大大地依赖于功率控制信号逻辑电平并且提供加宽的关态状态控制信号电压范围。 根据本教导的断电电路包括开关晶体管，用于向处于导通状态的负载电路提供电流并且用于在断开状态下中断电流，并且包括用于在开关晶体管中操作的电路 三态区在开态。

公开(公告)号：US07053701B2

公开(公告)日：2006-05-30

申请号：US10702018

申请日：2003-11-04

申请人： Michael W. Vice

发明人： Michael W. Vice

IPC分类号： H03F1/14 ,  H03F3/68 ,  H03F3/191

CPC分类号： H03F1/42 ,  H03F1/0277 ,  H03F1/565 ,  H03F3/72 ,  H03F2203/7239

摘要： A power amplifier output stage that provides multiple power states and mechanisms for enhancing the efficiency of each of its power states. A power amplifier output stage according to the present techniques includes a first output device for driving a load in a first power state and a second output device for driving the load in a second power state along with a matching network for the first power state and a circuit for adapting the matching network to the second power state.

摘要翻译： 功率放大器输出级，其提供多种功率状态和机制，用于增强其每个功率状态的效率。 根据本技术的功率放大器输出级包括用于驱动处于第一功率状态的负载的第一输出装置和用于在第二功率状态下驱动负载的第二输出装置以及用于第一功率状态的匹配网络，以及 用于使匹配网络适配到第二功率状态的电路。

公开(公告)号：US5752181A

公开(公告)日：1998-05-12

申请号：US574071

申请日：1995-12-18

申请人： Michael W. Vice

发明人： Michael W. Vice

IPC分类号： H03D7/14 ,  H04B1/26

CPC分类号： H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03D7/1491 ,  H03D2200/0023 ,  H03D2200/0043 ,  H03D7/14

摘要： Apparatus for reducing intermodulation distortion in a mixer output signal provides for back-to-back serial connected FET transistors joined at gate and source terminals and cancels intermodulation distortion. In one embodiment the apparatus provides first and second FET having their gates tied to one another and their sources tied to one another such that the FETs are connected back-to-back in series and have equal gate-to-source voltages and FET drain-to-source voltage that are equal in magnitude but opposite in sign to the second FET drain-to-source voltage. A control voltage, such as a local oscillator voltage signal is applied between the FET gate terminals and the FET source terminals to switch the conduction state of the serially connected FETs between a conducting state and a non-conducting state. A second signal, such as either an RF or an IF signal, is applied between the drain terminals of the FETs and this second signal passes through a channel combination defined by the serially connected FETs during channel conduction, and thus mixes with the control signal to generate the mixer output signal. Intermodulation distortion is introduced into the output signal by the first and second FET, but the structure and method provide for suppression or substantial cancellation of this intermodulation distortion in the final mixer output signal. Embodiments having a duplicity of serially connected FET pairs are also provided.

摘要翻译： 用于减少混频器输出信号中的互调失真的装置提供了在栅极和源极端子处连接的背对背串联连接的FET晶体管，并且消除了互调失真。 在一个实施例中，设备提供第一和第二FET，其栅极彼此连接并且它们的源极彼此连接，使得FET串联连接背对背并具有相同的栅极 - 源极电压和FET漏极 - 源极电压在幅度上相等但与第二FET漏极 - 源极电压的符号相反。 在FET栅极端子和FET源极端子之间施加诸如本地振荡器电压信号的控制电压，以在导通状态和非导通状态之间切换串联连接的FET的导通状态。 诸如RF或IF信号的第二信号被施加在FET的漏极端子之间，并且该第二信号在沟道传导期间通过由串联连接的FET限定的沟道组合，并且因此与控制信号混合 产生混频器输出信号。 通过第一和第二FET将互调失真引入输出信号，但是结构和方法提供抑制或基本消除最终混频器输出信号中的这种互调失真。 还提供了具有串联连接的FET对的重复的实施例。

公开(公告)号：US20080102777A1

公开(公告)日：2008-05-01

申请号：US11588720

申请日：2006-10-27

申请人： Michael W. Vice

发明人： Michael W. Vice

IPC分类号： H04B1/26

CPC分类号： H03D7/125

摘要： A mixing circuit is described in connection with various embodiments.

摘要翻译： 结合各种实施例描述混合电路。