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公开(公告)号：US20220374169A1
公开(公告)日：2022-11-24
申请号：US17398091
申请日：2021-08-10
Applicant: Microchip Technology Inc.
Inventor： Lorenzo Zuolo , Rino Micheloni
Abstract: A method for meeting quality of service (QoS) requirements in a flash controller that includes one or more instruction queues and a neural network engine. A configuration file for a QoS neural network is loaded into the neural network engine. A current command is received at the instruction queue(s). Feature values corresponding to commands in the instruction queue(s) are identified and are loaded into the neural network engine. A neural network operation of the QoS neural network is performed using as input the identified feature values to predict latency of the current command. The predicted latency is compared to a first latency threshold. When the predicted latency exceeds the first latency threshold one or more of the commands in the instruction queue(s) are modified. The commands are not modified when the predicted latency does not exceed the latency threshold. A next command in the instruction queue(s) is then performed.
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公开(公告)号：US20220058488A1
公开(公告)日：2022-02-24
申请号：US17148200
申请日：2021-01-13
Applicant: Microchip Technology Inc.
Inventor： Lorenzo Zuolo , Rino Micheloni
Abstract: A method includes storing configuration files of a Multi-Core Neural Network Inference (MCNNI) model having Independent Categorized-Core-Portions (ICCP's). Each ICCP corresponds to one of a plurality of categories for each parameter. A first plurality of weighting values on each row of the weighting matrix of the MCNNI model have a nonzero value and a second plurality of weighting values on each row having a value of zero. The configuration files are loaded into a neural network engine. The operation of the integrated circuit device is monitored to identify a usage value corresponding to each of the parameters. A single neural network operation is performed using the usage values as input to generate, at the output neurons of each ICCP, output values indicating an estimation of one or more variable. The output values of the ICCP that corresponds to the input usage values are identified and are sent as output.
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公开(公告)号：US12175363B2
公开(公告)日：2024-12-24
申请号：US17089891
申请日：2020-11-05
Applicant: Microchip Technology Inc.
Inventor： Lorenzo Zuolo , Rino Micheloni
Abstract: A method and apparatus for reading a flash memory device are disclosed. A Regression Neural Network (RNN) inference model is stored on a flash controller. The RNN inference model is configured for identifying at least one Threshold-Voltage-Shift Read-Error (TVS-RE) curve that identifies a number of errors as a function of Threshold Voltage Shift Offset (TVSO) values. The operation of a flash memory device is monitored to identify usage characteristic values. A neural network operation of the RNN inference model is performed to generate a TVS-RE curve corresponding to the usage characteristic values. The input for the neural network operation includes the usage characteristic values. A TVSO value is identified corresponding to a minimum value of the TVS-RE curve. A read of the flash memory device is performed using a threshold-voltage-shift read at the TVSO value.
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公开(公告)号：US20220188604A1
公开(公告)日：2022-06-16
申请号：US17347388
申请日：2021-06-14
Applicant: Microchip Technology Inc.
Inventor： Lorenzo Zuolo , Rino Micheloni
Abstract: A method for performing a neural network operation includes receiving weight and bias values of a deep neural network (DNN). An array of feature values, a bias value and a set of weight values for a single layer of the DNN are coupled to a neural network engine. Multiply-and-accumulate operations are performed on the single layer at one or more multiply and accumulate circuit (MAC) to obtain a sum corresponding to each neuron in the single layer. A layer output value corresponding to each neuron in the single layer is coupled to a corresponding input of the MAC. The coupling a bias value and a set of weight values, the performing multiply-and-accumulate operations and the coupling a layer output value are repeated to generate an output-layer-sum corresponding to each output-layer neuron and an activation function is performed on each output-layer-sum to generate DNN output values.
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公开(公告)号：US20220165348A1
公开(公告)日：2022-05-26
申请号：US17213675
申请日：2021-03-26
Applicant: Microchip Technology Inc.
Inventor： Lorenzo Zuolo , Rino Micheloni
Abstract: A method and apparatus for determining when actual wear of a flash memory device differs from a reliability state. Configuration files of a reliability-state classification neural network model are stored. The operation of a flash memory device is monitored to identify current physical characteristic values. A read of the flash memory device is performed to determine a number of errors. A neural network operation is performed using as input a set of threshold voltage shift offset values currently being used to perform reads of the flash memory device and the calculated number of errors, to identify a predicted reliability state. The identified current physical characteristic values are compared to corresponding tags associated with the predicted reliability state and a flag or other indication is stored when the comparison indicates that the identified current physical characteristic values do not correspond to the respective tags associated with the predicted reliability state.
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Patent Agency Ranking
公开(公告)号：US11514994B1
公开(公告)日：2022-11-29
申请号：US17506735
申请日：2021-10-21
Applicant: Microchip Technology Inc.
Inventor： Lorenzo Zuolo , Rino Micheloni
Abstract: A method for outlier management at a flash controller includes testing a flash memory device to identify one or more outlier blocks of the flash memory device. Hyperparameters for a DNN are loaded into a training circuit of the flash controller. Test reads of the one or more outlier blocks are performed and a number of errors in the test reads is identified. The DNN is trained using a mini-batch training process and using the identified number of errors in the test reads and is tested to determine whether the trained DNN meets a training error threshold. The performing, the identifying, the training and the testing are repeated until the trained DNN meets the training error threshold to identify parameters of an outlier-block DNN. A neural network operation is performed using the identified parameters to predict a set of TVSO values. A read is performed using the set of predicted TVSO values.
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公开(公告)号：US11514992B2
公开(公告)日：2022-11-29
申请号：US17234993
申请日：2021-04-20
Applicant: Microchip Technology Inc.
Inventor： Lorenzo Zuolo , Rino Micheloni
Abstract: A method for reading a flash memory device includes storing configuration files of reliability-state Classification Neural Network (CNN) models and Regression Neural Network (RNN) inference models, and storing reliability-state tags corresponding to reliability states. The current number of P/E cycles is identified and a reliability-state CNN model is selected corresponding to the current number of P/E cycles. A neural network operation of the selected reliability-state CNN model is performed to identify a predicted reliability state. Corresponding reliability-state tags are identified and a corresponding RNN inference model is selected. A neural network operation of the selected RNN inference model is performed, using the reliability-state tags as input, to generate output indicating the shape of a threshold-voltage-shift read-error (TVS-RE) curve. Threshold Voltage Shift Offset (TVSO) values are identified corresponding to a minimum value of the TVS-RE curve and a read is performed using a threshold-voltage-shift read at the identified TVSO values.
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公开(公告)号：US20220270698A1
公开(公告)日：2022-08-25
申请号：US17234993
申请日：2021-04-20
Applicant: Microchip Technology Inc.
Inventor： Lorenzo Zuolo , Rino Micheloni
Abstract: A method for reading a flash memory device includes storing configuration files of reliability-state Classification Neural Network (CNN) models and Regression Neural Network (RNN) inference models, and storing reliability-state tags corresponding to reliability states. The current number of P/E cycles is identified and a reliability-state CNN model is selected corresponding to the current number of P/E cycles. A neural network operation of the selected reliability-state CNN model is performed to identify a predicted reliability state. Corresponding reliability-state tags are identified and a corresponding RNN inference model is selected. A neural network operation of the selected RNN inference model is performed, using the reliability-state tags as input, to generate output indicating the shape of a threshold-voltage-shift read-error (TVS-RE) curve. Threshold Voltage Shift Offset (TVSO) values are identified corresponding to a minimum value of the TVS-RE curve and a read is performed using a threshold-voltage-shift read at the identified TVSO values.
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公开(公告)号：US11934696B2
公开(公告)日：2024-03-19
申请号：US17398091
申请日：2021-08-10
Applicant: Microchip Technology Inc.
Inventor： Lorenzo Zuolo , Rino Micheloni
CPC classification number: G06F3/0659 , G06F3/0611 , G06F3/0679 , G06N3/08
Abstract: A method for meeting quality of service (QoS) requirements in a flash controller that includes one or more instruction queues and a neural network engine. A configuration file for a QoS neural network is loaded into the neural network engine. A current command is received at the instruction queue(s). Feature values corresponding to commands in the instruction queue(s) are identified and are loaded into the neural network engine. A neural network operation of the QoS neural network is performed using as input the identified feature values to predict latency of the current command. The predicted latency is compared to a first latency threshold. When the predicted latency exceeds the first latency threshold one or more of the commands in the instruction queue(s) are modified. The commands are not modified when the predicted latency does not exceed the latency threshold. A next command in the instruction queue(s) is then performed.
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公开(公告)号：US11699493B2
公开(公告)日：2023-07-11
申请号：US17385857
申请日：2021-07-26
Applicant: Microchip Technology Inc.
Inventor： Lorenzo Zuolo , Rino Micheloni
CPC classification number: G11C16/3427 , G06N3/063 , G06N3/08 , G11C16/102 , G11C16/26 , G11C16/3404 , G11C16/3495
Abstract: A method for performing a read of a flash memory includes storing configuration files for a plurality of RRD-compensating RNNs. A current number of PE cycles for a flash memory are identified and TVSO values are identified corresponding to the current number of PE cycles. A current retention time and a current number of read disturbs for the flash memory are identified. The configuration file of the RRD-compensating RNN corresponding to the current number of PE cycles, the current retention time and current number of read disturbs is selected and is loaded into a neural network engine to form an RNN core in the neural network engine. A neural network operation of the RNN core is performed to predict RRD-compensated TVSO values. The input to the neural network operation includes the identified TVSO values. A read of the flash memory is performed using the predicted RRD-compensated TVSO values.
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