公开(公告)号：US11429709B2

公开(公告)日：2022-08-30

申请号：US16803865

申请日：2020-02-27

Applicant: Microchip Technology Incorporated

Inventor： Daniel J. Russell ,  Albert S. Weiner ,  Suraj Sridhar

IPC: H04L29/06 ,  G06F21/44

Abstract: Some embodiments of the present disclosure relate to a system that may include a replaceable module and a user device. The replaceable module may include an element and a one-wire authentication element in parallel with the element. The user device may be configured for operable coupling with the replaceable module. The user device may include a power source configured to provide power to the element, an authentication unit configured to perform a verification process for verifying authenticity of the replaceable module, and a signal conditioning unit arranged in a communication path between the one-wire authentication element and the authentication unit.

公开(公告)号：US11443820B2

公开(公告)日：2022-09-13

申请号：US15956526

申请日：2018-04-18

Applicant: Microchip Technology Incorporated

Inventor： Lorenzo Bedarida ,  Simone Bartoli ,  Albert S. Weiner

IPC: G11C29/02 ,  G06F13/28 ,  G11C8/10 ,  G11C16/08 ,  G11C7/24 ,  G11C8/20 ,  G11C29/44 ,  G11C29/38

Abstract: A memory device, memory address decoder, a memory system and related method for memory attack detection are disclosed. An apparatus includes a memory decoder include multiple stages in a decoding path configured to generate a select signal from an input address signal, and fault detecting logic operably coupled with the memory decoder and configured to receive feedback signals distributed from the multiple stages indicative of a fault along the decoding path.

公开(公告)号：US20190228831A1

公开(公告)日：2019-07-25

申请号：US15956526

申请日：2018-04-18

Applicant: Microchip Technology Incorporated

Inventor： Lorenzo Bedarida ,  Simone Bartoli ,  Albert S. Weiner

IPC: G11C29/02 ,  G11C16/08 ,  G11C8/10 ,  G06F13/28

Abstract: A memory device, memory address decoder, a memory system and related method for memory attack detection are disclosed. An apparatus includes a memory decoder include multiple stages in a decoding path configured to generate a select signal from an input address signal, and fault detecting logic operably coupled with the memory decoder and configured to receive feedback signals distributed from the multiple stages indicative of a fault along the decoding path.

公开(公告)号：US20220358204A1

公开(公告)日：2022-11-10

申请号：US17813558

申请日：2022-07-19

Applicant: Microchip Technology Incorporated

Inventor： Daniel J. Russell ,  Albert S. Weiner ,  Suraj Sridhar

IPC: G06F21/44

Abstract: Some embodiments of the present disclosure relate to a system that may include a replaceable module and a user device. The replaceable module may include an element and a one-wire authentication element in parallel with the element. The user device may be configured for operable coupling with the replaceable module. The user device may include a power source configured to provide power to the element, an authentication unit configured to perform a verification process for verifying authenticity of the replaceable module, and a signal conditioning unit arranged in a communication path between the one-wire authentication element and the authentication unit.

公开(公告)号：US12001539B2

公开(公告)日：2024-06-04

申请号：US17813558

申请日：2022-07-19

Applicant: Microchip Technology Incorporated

Inventor： Daniel J. Russell ,  Albert S. Weiner ,  Suraj Sridhar

IPC: H04L29/06 ,  G06F21/44

CPC classification number: G06F21/44

Abstract: Some embodiments of the present disclosure relate to a system that may include a replaceable module and a user device. The replaceable module may include an element and a one-wire authentication element in parallel with the element. The user device may be configured for operable coupling with the replaceable module. The user device may include a power source configured to provide power to the element, an authentication unit configured to perform a verification process for verifying authenticity of the replaceable module, and a signal conditioning unit arranged in a communication path between the one-wire authentication element and the authentication unit.

公开(公告)号：US20210110022A1

公开(公告)日：2021-04-15

申请号：US16803865

申请日：2020-02-27

Applicant: Microchip Technology Incorporated

Inventor： Daniel J. Russell ,  Albert S. Weiner ,  Suraj Sridhar

IPC: G06F21/44

Abstract: Some embodiments of the present disclosure relate to a system that may include a replaceable module and a user device. The replaceable module may include an element and a one-wire authentication element in parallel with the element. The user device may be configured for operable coupling with the replaceable module. The user device may include a power source configured to provide power to the element, an authentication unit configured to perform a verification process for verifying authenticity of the replaceable module, and a signal conditioning unit arranged in a communication path between the one-wire authentication element and the authentication unit.