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公开(公告)号:US20240125818A1
公开(公告)日:2024-04-18
申请号:US18143414
申请日:2023-05-04
Applicant: Microchip Technology Incorporated
Inventor: Gerald Steele
CPC classification number: G01R1/203 , G01R1/0416 , G01R1/30 , G01R19/32
Abstract: An integrated circuit (IC) package includes a partial leadframe including (a) a shunt resistor leadframe element including a pair of shunt resistor contacts and a shunt resistor conductively connected between the pair of shunt resistor contacts and (b) at least one external contact leadframe element separate from the shunt resistor leadframe element, the at least one external contact leadframe element allowing external contact to the IC package. The IC package also a mold encapsulation formed over the shunt resistor leadframe element, wherein the pair of shunt resistor contacts are externally contactable through the mold encapsulation.
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公开(公告)号:US20240405730A1
公开(公告)日:2024-12-05
申请号:US18658240
申请日:2024-05-08
Applicant: Microchip Technology Incorporated
Inventor: Gerald Steele , David Gammie , Dong Wang
IPC: H03F3/00
Abstract: Integrated circuits and methods to provide an operative coupling comprising an input stage and an output stage between an analog input and an analog output; synchronously operate a plurality of high voltage domain switches of the input stage and a plurality of low voltage domain switches of the output stage at a frequency to galvanically isolate the input stage from the output stage across a plurality of capacitors having a plurality of input plates respectively connected to the switches of the input and output stages; supply an analog input signal to the input stage; transfer a differential voltage signal component within a range of a common mode voltage supply from the high voltage domain of the input stage to the low voltage domain of the output stage; differentially amplify the low voltage domain differential voltage signal component; and output an analog output signal.
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