公开(公告)号：US11996815B2

公开(公告)日：2024-05-28

申请号：US17456432

申请日：2021-11-24

Applicant: Microchip Technology Incorporated

Inventor： Steven Vida ,  David Gammie

IPC: H03H11/28

CPC classification number: H03H11/28

Abstract: Disclosed examples include an apparatus. The apparatus may include a differential signal path portion, a first circuit, and a second circuit. The first circuit may be arranged at the differential signal path portion to set a differential impedance of the differential signal path portion. The second circuit may be arranged outside of the differential signal path portion to set a common-mode impedance of the differential signal path portion lower than the differential impedance.

公开(公告)号：US10199919B2

公开(公告)日：2019-02-05

申请号：US15960930

申请日：2018-04-24

Applicant: Microchip Technology Incorporated

Inventor： David Gammie

IPC: H02M1/38 ,  H02M3/158 ,  H02M1/088 ,  H03K17/567 ,  H03K5/24 ,  H02M3/157 ,  H02M3/156 ,  G05F1/24 ,  H02M1/00

Abstract: A circuit and method for controlling a power converter having a high-side and a low-side switch are provided. The circuit may include a comparator configured to receive a reference voltage at a first input and a ramp voltage at a second output, and to output a delay signal based on a comparison of the reference voltage and the ramp voltage. The delay signal may be configured to turn on one or more of the high-side switch and the low-side switch. The circuit may increase or decrease the reference voltage based on a dead time, which equals an amount of time when the high-side switch and the low-side switch are turned off. The circuit may include a first switch that is controlled to lower the reference voltage if a dead time exceeds a first threshold, and a second switch that is controlled to raise the reference voltage if the dead time delay signal is below a second threshold.

公开(公告)号：US20220376666A1

公开(公告)日：2022-11-24

申请号：US17664813

申请日：2022-05-24

Applicant: Microchip Technology Incorporated

Inventor： David Gammie

IPC: H03F3/45 ,  G01R19/10

Abstract: One or more examples relate to an apparatus to amplify differential voltage signal components of voltage across a resistor. Such an apparatus may include a resistor; a differential amplification circuit operatively coupled with the resistor to amplify a differential voltage signal component of a voltage across the resistor; and an operative coupling between the resistor and the differential amplification circuit to pass the differential voltage signal component and isolate a common mode voltage signal component of the voltage across the resistor.

公开(公告)号：US20180323696A1

公开(公告)日：2018-11-08

申请号：US15960930

申请日：2018-04-24

Applicant: Microchip Technology Incorporated

Inventor： David Gammie

IPC: H02M1/088 ,  H02M3/158 ,  H03K17/567 ,  H03K5/24

CPC classification number: H02M1/088 ,  G05F1/24 ,  H02M1/32 ,  H02M1/38 ,  H02M3/156 ,  H02M3/157 ,  H02M3/158 ,  H02M3/1588 ,  H02M2001/0025 ,  H02M2001/0048 ,  H02M2001/385 ,  H03K5/24 ,  H03K17/0822 ,  H03K17/166 ,  H03K17/567 ,  H03K2217/0063 ,  H03K2217/0072

Abstract: A circuit and method for controlling a power converter having a high-side and a low-side switch are provided. The circuit may include a comparator configured to receive a reference voltage at a first input and a ramp voltage at a second output, and to output a delay signal based on a comparison of the reference voltage and the ramp voltage. The delay signal may be configured to turn on one or more of the high-side switch and the low-side switch. The circuit may increase or decrease the reference voltage based on a dead time, which equals an amount of time when the high-side switch and the low-side switch are turned off. The circuit may include a first switch that is controlled to lower the reference voltage if a dead time exceeds a first threshold, and a second switch that is controlled to raise the reference voltage if the dead time delay signal is below a second threshold.

公开(公告)号：US20250158612A1

公开(公告)日：2025-05-15

申请号：US18949712

申请日：2024-11-15

Applicant: Microchip Technology Incorporated

Inventor： David Gammie ,  Lunal Khuon

IPC: H03K17/687

Abstract: An apparatus may include a Silicon Carbide (SiC) Field-Effect Transistor (PET) and a sense buffer circuit. The sense buffer circuit may sense a gate-to-source voltage (VGS) of the SiC PET. The sense buffer circuit may include a buffer circuit at an input of the sense buffer circuit. The buffer circuit may have a smaller input voltage range than the sense buffer circuit.

公开(公告)号：US20240405730A1

公开(公告)日：2024-12-05

申请号：US18658240

申请日：2024-05-08

Applicant: Microchip Technology Incorporated

Inventor： Gerald Steele ,  David Gammie ,  Dong Wang

IPC: H03F3/00

Abstract: Integrated circuits and methods to provide an operative coupling comprising an input stage and an output stage between an analog input and an analog output; synchronously operate a plurality of high voltage domain switches of the input stage and a plurality of low voltage domain switches of the output stage at a frequency to galvanically isolate the input stage from the output stage across a plurality of capacitors having a plurality of input plates respectively connected to the switches of the input and output stages; supply an analog input signal to the input stage; transfer a differential voltage signal component within a range of a common mode voltage supply from the high voltage domain of the input stage to the low voltage domain of the output stage; differentially amplify the low voltage domain differential voltage signal component; and output an analog output signal.

公开(公告)号：US20220166411A1

公开(公告)日：2022-05-26

申请号：US17456432

申请日：2021-11-24

Applicant: Microchip Technology Incorporated

Inventor： Steven Vida ,  David Gammie

IPC: H03H11/28

Abstract: Disclosed examples include an apparatus. The apparatus may include a differential signal path portion, a first circuit, and a second circuit. The first circuit may be arranged at the differential signal path portion to set a differential impedance of the differential signal path portion. The second circuit may be arranged outside of the differential signal path portion to set a common-mode impedance of the differential signal path portion lower than the differential impedance.