TEMPERATURE INTERPOLATION TECHNIQUES FOR MULTIPLE INTEGRATED CIRCUIT REFERENCES

    公开(公告)号:US20220261027A1

    公开(公告)日:2022-08-18

    申请号:US17666124

    申请日:2022-02-07

    Abstract: Techniques for providing temperature trim codes to multiple reference circuits of an integrated circuit are provided. In an example, a string of primary latch circuits can provide a set of pre-defined temperature trim codes to a multiplexer in response to a token of a series of tokens. The multiplexer can provide two trim of the trim codes to an interpolator based on a temperature reading of the integrated circuit. The interpolator can provide an interpolated trim code and the trim code can be distributed to a reference circuit based on the token.

    Memory device with redundancy for page-based repair

    公开(公告)号:US12062407B2

    公开(公告)日:2024-08-13

    申请号:US17823740

    申请日:2022-08-31

    CPC classification number: G11C29/76 G11C29/54 G11C29/808

    Abstract: Apparatus and methods for page-based soft post package repair are disclosed. Based on data stored in a storage element, an address may be decoded to a prime row, a row-based redundant row, or a page-based redundant row. A match logic circuit may determine whether the address corresponds to a defective prime row and generate a match signal. A decoder can select a redundant row to be accessed instead of a prime row in response to the match signal indicating that the address data corresponding to the address to be accessed matches defective address data stored in a volatile memory. A page-based redundant row allows for page-by-page substitution for defective memory, allowing functional portions of memory to continue to be used.

    TEMPERATURE INTERPOLATION TECHNIQUES FOR MULTIPLE INTEGRATED CIRCUIT REFERENCES

    公开(公告)号:US20220035396A1

    公开(公告)日:2022-02-03

    申请号:US16983811

    申请日:2020-08-03

    Abstract: Techniques for providing temperature trim codes to multiple reference circuits of an integrated circuit are provided. In an example, a string of primary latch circuits can provide a set of pre-defined temperature trim codes to a multiplexer in response to a token of a series of tokens. The multiplexer can provide two trim of the trim codes to an interpolator based on a temperature reading of the integrated circuit. The interpolator can provide an interpolated trim code and the trim code can be distributed to a reference circuit based on the token.

    MEMORY DEVICE WITH REDUNDANCY FOR PAGE-BASED REPAIR

    公开(公告)号:US20240363192A1

    公开(公告)日:2024-10-31

    申请号:US18761619

    申请日:2024-07-02

    CPC classification number: G11C29/76 G11C29/54 G11C29/808

    Abstract: Apparatus and methods for page-based soft post package repair are disclosed. Based on data stored in a storage element, an address may be decoded to a prime row, a row-based redundant row, or a page-based redundant row. A match logic circuit may determine whether the address corresponds to a defective prime row and generate a match signal. A decoder can select a redundant row to be accessed instead of a prime row in response to the match signal indicating that the address data corresponding to the address to be accessed matches defective address data stored in a volatile memory. A page-based redundant row allows for page-by-page substitution for defective memory, allowing functional portions of memory to continue to be used.

    MEMORY DEVICE WITH REDUNDANCY FOR PAGE-BASED REPAIR

    公开(公告)号:US20240071558A1

    公开(公告)日:2024-02-29

    申请号:US17823740

    申请日:2022-08-31

    CPC classification number: G11C29/76 G11C29/54 G11C29/808

    Abstract: Apparatus and methods for page-based soft post package repair are disclosed. Based on data stored in a storage element, an address may be decoded to a prime row, a row-based redundant row, or a page-based redundant row. A match logic circuit may determine whether the address corresponds to a defective prime row and generate a match signal. A decoder can select a redundant row to be accessed instead of a prime row in response to the match signal indicating that the address data corresponding to the address to be accessed matches defective address data stored in a volatile memory. A page-based redundant row allows for page-by-page substitution for defective memory, allowing functional portions of memory to continue to be used.

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