BIAS CONTROL CIRCUIT AND POWER AMPLIFICATION MODULE

    公开(公告)号:US20170179892A1

    公开(公告)日:2017-06-22

    申请号:US15435442

    申请日:2017-02-17

    IPC分类号: H03F1/30 H03F3/24

    摘要: Provided is a bias control circuit that includes: a reference voltage circuit that generates a reference voltage; a resistor; a temperature dependent current generating circuit that generates a temperature dependent current, which changes depending on temperature, on the basis of the reference voltage and that supplies the temperature dependent current to one end of the resistor; a reference voltage buffer circuit that applies the reference voltage to the other end of the resistor; a constant current generating circuit that generates a constant current, which is for driving the reference voltage buffer circuit, on the basis of the reference voltage and that supplies the constant current to the other end of the resistor; and a bias generating circuit that generates a bias voltage or a bias current for a power amplification circuit on the basis of the voltage at the one end of the resistor.

    SHUNT DRIVER CIRCUIT AND METHOD FOR PROVIDING AN OUTPUT SIGNAL
    3.
    发明申请
    SHUNT DRIVER CIRCUIT AND METHOD FOR PROVIDING AN OUTPUT SIGNAL 有权
    分路驱动电路和提供输出信号的方法

    公开(公告)号:US20160218622A1

    公开(公告)日:2016-07-28

    申请号:US15005965

    申请日:2016-01-25

    申请人: ams AG

    发明人: Mark Niederberger

    IPC分类号: H02M3/158 G01R15/14

    摘要: In an embodiment a shunt driver circuit has a first and a second connection terminal (N1, N2) forming a two-wire interface (N1, N2), the first connection terminal (N1) being prepared to receive a supply power and to provide an output signal (Sout), the second connection terminal (N2) being connected to a reference potential terminal (10), an Operational Transconductance Amplifier, OTA, (11) comprising a first input coupled to the first connection terminal (N1), a second input for receiving a first reference signal (Sref1) and an output (12) for providing a signal (S12) depending on a difference between an input signal on the first input and the first reference signal (Sref1), a capacitor (C1) coupled between the output (12) and the first input of the OTA (11) via the second connection terminal (N2) in a control loop, and a controlled current source (13) coupled between the output (12) of the OTA (11) and the second connection terminal (N2). The controlled current source (13) is controlled to provide an additional current (Ifall) during a transient phase of the output signal (Sout).

    摘要翻译: 在一个实施例中,并联驱动器电路具有形成双线接口(N1,N2)的第一和第二连接端子(N1,N2),所述第一连接端子(N1)准备接收电源并提供 输出信号(Sout),第二连接端子(N2)连接到参考电位端子(10),操作跨导放大器OTA(11)包括耦合到第一连接端子(N1)的第一输入端,第二 用于接收第一参考信号(Sref1)的输入端和用于根据第一输入端的输入信号与第一参考信号(Sref1)之间的差异提供信号(S12)的输出端(12),耦合 在控制回路中经由第二连接端子(N2)在输出端(12)和OTA(11)的第一输入端之间,以及耦合在OTA(11)的输出端(12)之间的受控电流源(13) 和第二连接端子(N2)。 控制电流源(13)被控制以在输出信号(Sout)的瞬态阶段期间提供附加电流(Ifall)。

    Reference circuit arrangement and method for generating a reference voltage using a branched current path
    4.
    发明授权
    Reference circuit arrangement and method for generating a reference voltage using a branched current path 有权
    参考电路布置和使用分支电流路径产生参考电压的方法

    公开(公告)号:US09317057B2

    公开(公告)日:2016-04-19

    申请号:US14236065

    申请日:2012-07-30

    摘要: Reference circuit arrangement according to this invention comprises a branched current path (BE) connecting a first and second terminal (T+, T−) via an intermediate terminal (TN). The intermediate terminal (TN) is connected to a reference terminal (GND). A current path (PTAT) is coupled between the first and second terminal (T+, T−) via the reference terminal (GND). A feedback loop (FB) is connected to the first and second terminal (T+, T−) and designed to control, at the first and second terminal (T+, T−), a virtual ground potential. A reference path (REF) is connected to the feedback loop (FB) having a reference input for receiving from the feedback loop a reference current (Iref) and reference output (Vref) to provide a reference voltage.

    摘要翻译: 根据本发明的参考电路装置包括经由中间端子(TN)连接第一和第二端子(T +,T)的分支电流路径(BE)。 中间端子(TN)连接到参考端子(GND)。 电流路径(PTAT)通过参考端(GND)耦合在第一和第二端(T +,T-)之间。 反馈回路(FB)连接到第一和第二端子(T +,T),并被设计成在第一和第二端子(T +,T)处控制虚拟接地电位。 参考路径(REF)连接到具有用于从反馈回路接收参考电流(Iref)和参考输出(Vref)的参考输入的反馈回路(FB),以提供参考电压。

    Current generator circuit and methods for providing an output current
    5.
    发明授权
    Current generator circuit and methods for providing an output current 有权
    电流发生器电路和提供输出电流的方法

    公开(公告)号:US09244479B2

    公开(公告)日:2016-01-26

    申请号:US14448444

    申请日:2014-07-31

    发明人: Aaron Willey

    IPC分类号: G05F3/22 G05F3/26 G05F3/20

    CPC分类号: G05F3/262 G05F3/20

    摘要: Current circuits, circuits configured to provide a bias voltage, and methods for providing a bias voltage are described, including a current circuit configured to receive a reference current and having an output at which an output current is provided. One such current circuit includes a first current mirror configured to receive a first portion of the reference current and further configured to mirror the first portion of the reference current to provide a first current. The current circuit further includes a second current mirror configured to receive a second portion of the reference current and receive the first current. The second current mirror is further configured to provide a portion of the first current to the output of the current circuit as the output current and to receive another portion of the first current and mirror the same as the second portion of the reference current.

    摘要翻译: 描述了配置为提供偏置电压的电流电路,被配置为提供偏置电压的电路以及用于提供偏置电压的方法,包括被配置为接收参考电流并具有提供输出电流的输出的电流电路。 一个这样的电流电路包括被配置为接收参考电流的第一部分的第一电流镜,并且还被配置为镜像参考电流的第一部分以提供第一电流。 当前电路还包括被配置为接收参考电流的第二部分并接收第一电流的第二电流镜。 第二电流镜还被配置为将第一电流的一部分提供给电流电路的输出作为输出电流,并且接收第一电流的另一部分并且与第二部分参考电流相同。

    BANDGAP REFERENCE CIRCUIT
    6.
    发明申请
    BANDGAP REFERENCE CIRCUIT 有权
    带宽参考电路

    公开(公告)号:US20140340068A1

    公开(公告)日:2014-11-20

    申请号:US14164259

    申请日:2014-01-27

    发明人: Wen-Sheng Lin

    IPC分类号: G05F3/08

    摘要: A bandgap reference circuit is provided and which includes an operating voltage, a current mirror, a first p-channel metal-oxide semiconductor (PMOS) transistor and an amplifier. The current mirror is coupled to the operating voltage. The first PMOS transistor is coupled to the operating voltage and the current mirror. The amplifier is coupled to the current mirror and the first PMOS transistor. When the bandgap reference circuit is activated, the operating voltage starts to supply voltage such that the first PMOS transistor is turned on first. When the operating voltage is higher than a preset voltage level, the first PMOS transistor is turned off, in order to complete an start-up process.

    摘要翻译: 提供了带隙参考电路,其包括工作电压,电流镜,第一p沟道金属氧化物半导体(PMOS)晶体管和放大器。 电流镜与工作电压耦合。 第一PMOS晶体管耦合到工作电压和电流镜。 放大器耦合到电流镜和第一PMOS晶体管。 当带隙参考电路被激活时,工作电压开始提供电压,使得第一PMOS晶体管首先导通。 当工作电压高于预设电压电平时,第一个PMOS晶体管关闭,以完成启动过程。

    Bandgap Reference Circuit
    7.
    发明申请
    Bandgap Reference Circuit 有权
    带隙参考电路

    公开(公告)号:US20140266139A1

    公开(公告)日:2014-09-18

    申请号:US13832521

    申请日:2013-03-15

    申请人: Matthias Eberlein

    发明人: Matthias Eberlein

    IPC分类号: G05F3/16

    CPC分类号: G05F3/16 G05F3/20

    摘要: A circuit for generating a temperature-stabilized reference voltage on a semiconductor chip includes a differential amplifier having a first input, a second input and an output. The circuit further includes a CTAT circuit configured to generate a CTAT voltage at an output thereof. A first resistor is coupled between the output of the differential amplifier and the output of the CTAT circuit. Further, the first resistor is connected between the first input and the second input of the differential amplifier.

    摘要翻译: 用于在半导体芯片上产生温度稳定的参考电压的电路包括具有第一输入,第二输入和输出的差分放大器。 电路还包括被配置为在其输出处产生CTAT电压的CTAT电路。 第一个电阻耦合在差分放大器的输出端和CTAT电路的输出端之间。 此外,第一电阻器连接在差分放大器的第一输入端和第二输入端之间。

    REFERENCE CIRCUIT ARRANGEMENT AND METHOD FOR GENERATING A REFERENCE VOLTAGE
    8.
    发明申请
    REFERENCE CIRCUIT ARRANGEMENT AND METHOD FOR GENERATING A REFERENCE VOLTAGE 有权
    参考电路布置和产生参考电压的方法

    公开(公告)号:US20140239936A1

    公开(公告)日:2014-08-28

    申请号:US14236065

    申请日:2012-07-30

    IPC分类号: G05F3/30

    摘要: Reference circuit arrangement according to this invention comprises a branched current path (BE) connecting a first and second terminal (T+, T−) via an intermediate terminal (TN). The intermediate terminal (TN) is connected to a reference terminal (GND). A current path (PTAT) is coupled between the first and second terminal (T+, T−) via the reference terminal (GND). A feedback loop (FB) is connected to the first and second terminal (T+, T−) and designed to control, at the first and second terminal (T+, T−), a virtual ground potential. A reference path (REF) is connected to the feedback loop (FB) having a reference input for receiving from the feedback loop a reference current (Iref) and reference output (Vref) to provide a reference voltage.

    摘要翻译: 根据本发明的参考电路装置包括经由中间端子(TN)连接第一和第二端子(T +,T)的分支电流路径(BE)。 中间端子(TN)连接到参考端子(GND)。 电流路径(PTAT)通过参考端(GND)耦合在第一和第二端(T +,T-)之间。 反馈回路(FB)连接到第一和第二端子(T +,T),并被设计成在第一和第二端子(T +,T)处控制虚拟接地电位。 参考路径(REF)连接到具有用于从反馈回路接收参考电流(Iref)和参考输出(Vref)的参考输入的反馈回路(FB),以提供参考电压。

    SEMICONDUCTOR DEVICE
    9.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号:US20140084993A1

    公开(公告)日:2014-03-27

    申请号:US13792387

    申请日:2013-03-11

    IPC分类号: G05F3/20

    摘要: According to one embodiment, a semiconductor device includes: a substrate; a first circuit portion; and a second circuit portion. The first circuit portion includes: a first and a second switching elements, and a first and a second diodes. The second circuit portion includes a third and a fourth switching elements, and a third and a fourth diodes. The first switching element is juxtaposed with the second switching element in a first direction, and is juxtaposed with the fourth switching element in a second direction. The third switching element is juxtaposed with the fourth switching element in the first direction, and is juxtaposed with the second switching element in the second direction. A voltage is applied to electrodes of the first and third switching elements. A voltage of a polarity opposite the first voltage is applied to electrodes of the second and fourth switching elements.

    摘要翻译: 根据一个实施例,半导体器件包括:衬底; 第一电路部分; 和第二电路部分。 第一电路部分包括:第一和第二开关元件,以及第一和第二二极管。 第二电路部分包括第三和第四开关元件,以及第三和第四二极管。 第一开关元件在第一方向上与第二开关元件并置,并且在第二方向上与第四开关元件并置。 第三开关元件与第四开关元件沿第一方向并置,并且在第二方向上与第二开关元件并置。 电压施加到第一和第三开关元件的电极。 与第一电压相反的极性的电压被施加到第二和第四开关元件的电极。

    REFERENCE VOLTAGE GENERATION CIRCUIT, POWER SOURCE DEVICE, LIQUID CRYSTAL DISPLAY DEVICE
    10.
    发明申请
    REFERENCE VOLTAGE GENERATION CIRCUIT, POWER SOURCE DEVICE, LIQUID CRYSTAL DISPLAY DEVICE 失效
    参考电压发生电路,电源装置,液晶显示装置

    公开(公告)号:US20110298780A1

    公开(公告)日:2011-12-08

    申请号:US13117285

    申请日:2011-05-27

    申请人: Kazuhiro Murakami

    发明人: Kazuhiro Murakami

    IPC分类号: G09G3/36 G06F3/038 G05F3/16

    CPC分类号: G05F3/20

    摘要: A reference voltage generation circuit of the disclosure includes a first amplifier circuit and a second amplifier circuit. The first amplifier circuit includes a first input stage including two npn transistors or two NMOS transistors having base terminals or gate terminals to which a variable voltage and a predetermined lower limit voltage are inputted. A first output stage includes a pnp transistor or a PMOS transistor having an emitter terminal or a source terminal connected to an output terminal of a reference voltage. A first amplifier stage controls the first output stage for equalizing the higher one of the variable voltage and the lower limit voltage with the reference voltage. The second amplifier circuit includes a second input stage including two npn transistors or two NMOS transistors having base terminals or gate terminals to which the reference voltage and a predetermined higher limit voltage are inputted, a second output stage includes a pnp transistor or a PMOS transistor having an emitter terminal or a source terminal connected to an output terminal for the reference voltage, and a second amplifier stage to control the second output stage for equalizing the reference voltage with the higher limit voltage.

    摘要翻译: 本公开的参考电压产生电路包括第一放大器电路和第二放大器电路。 第一放大器电路包括具有两个npn晶体管的第一输入级或具有输入可变电压和预定下限电压的基极或栅极的两个NMOS晶体管。 第一输出级包括具有连接到参考电压的输出端的发射极端子或源极端子的pnp晶体管或PMOS晶体管。 第一放大器级控制第一输出级,以用参考电压来均衡较高的可变电压和下限电压。 第二放大器电路包括具有两个npn晶体管的第二输入级或具有输入基准电压和预定上限电压的基极端子或栅极端子的两个NMOS晶体管,第二输出级包括pnp晶体管或具有 连接到用于参考电压的输出端子的发射极端子或源极端子,以及用于控制第二输出级的第二放大器级,用于使参考电压与上限电压相等。