公开(公告)号：US20240428839A1

公开(公告)日：2024-12-26

申请号：US18826719

申请日：2024-09-06

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Angelo VISCONTI ,  Giorgio SERVALLI

IPC: G11C11/22

Abstract: At least one portion of a memory array may be arranged to provide high density non-volatile random access memory (HIGH DENSITY NON-VOLATILE RAM) while at least one other portion of the memory array may be arranged to provide dynamic random access memory (DRAM)-like memory. In some examples, the memory array may be arranged by programming one or more configuration devices. In some examples, the configuration device may include one or more switches to couple one or more memory cells to a sense amplifier. In some examples, the configuration device may include fuses and/or antifuses to couple one or more memory cells to a sense amplifier. In some examples, the portions of the memory array may be reconfigurable from one arrangement to another arrangement.

公开(公告)号：US20230352073A1

公开(公告)日：2023-11-02

申请号：US17732885

申请日：2022-04-29

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Angelo VISCONTI ,  Giorgio SERVALLI

IPC: G11C11/22

CPC classification number: G11C11/2255 ,  G11C11/221 ,  G11C11/2273

Abstract: At least one portion of a memory array may be arranged to provide high density non-volatile random access memory (HIGH DENSITY NON-VOLATILE RAM) while at least one other portion of the memory array may be arranged to provide dynamic random access memory (DRAM)-like memory. In some examples, the memory array may be arranged by programming one or more configuration devices. In some examples, the configuration device may include one or more switches to couple one or more memory cells to a sense amplifier. In some examples, the configuration device may include fuses and/or antifuses to couple one or more memory cells to a sense amplifier. In some examples, the portions of the memory array may be reconfigurable from one arrangement to another arrangement.

公开(公告)号：US20230236753A1

公开(公告)日：2023-07-27

申请号：US17854639

申请日：2022-06-30

Applicant: Micron Technology, Inc.

Inventor： Marco SFORZIN ,  Angelo VISCONTI ,  Giorgio SERVALLI ,  Daniele BALLUCHI ,  Paolo AMATO

IPC: G06F3/06

CPC classification number: G06F3/0652 ,  G06F3/0616 ,  G06F3/0673

Abstract: Provided is a computing system including a memory system in communication with a host, to store data therein. The memory system includes a memory having a plurality of memory components coupled to the controller via a memory interface; and a memory controller configured to communicate with the memory to control data transmission and performing scrubbing operation of the memory components and detecting a region of the memory to be sanitized and performing a sanitization operation of the detected region to prevent the occurrence of failure.