公开(公告)号：US20200312712A1

公开(公告)日：2020-10-01

申请号：US16364841

申请日：2019-03-26

Applicant: Micron Technology, Inc.

Inventor： Anish Khandekar ,  Lars P. Heineck ,  Silvia Borsari ,  Zhiqiang Xie

IPC: H01L21/768

Abstract: Methods, apparatuses, and systems related to selectively depositing a liner material on a sidewall of an opening are described. An example method includes forming a liner material on a dielectric material of sidewalls of an opening and a bottom surface of an opening and removing the first liner material of the sidewalls of the opening and the bottom surface of the opening using a non-selective etch chemistry. The example method further includes forming a second liner material on the dielectric material of the sidewalls of the opening to avoid contact with the bottom surface of the opening.

公开(公告)号：US20140349454A1

公开(公告)日：2014-11-27

申请号：US14456337

申请日：2014-08-11

Applicant: Micron Technology, Inc.

Inventor： Alex Schrinsky ,  Anish Khandekar ,  Pavan Aella ,  Niraj B. Rana

IPC: H01L27/115

CPC classification number: H01L27/11556 ,  H01L21/32134 ,  H01L27/11582 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7889 ,  H01L29/7926

Abstract: Methods are disclosed that include selectively etching diffused regions to form recesses in semiconductor material, and forming charge storage structures in the recesses. Additional embodiments are disclosed.

Abstract translation: 公开了包括选择性地蚀刻扩散区域以在半导体材料中形成凹槽的方法，以及在凹槽中形成电荷存储结构。 公开了另外的实施例。

公开(公告)号：US10937690B2

公开(公告)日：2021-03-02

申请号：US16364841

申请日：2019-03-26

Applicant: Micron Technology, Inc.

Inventor： Anish Khandekar ,  Lars P. Heineck ,  Silvia Borsari ,  Zhiqiang Xie

IPC: H01L21/768 ,  H01L21/311

Abstract: Methods, apparatuses, and systems related to selectively depositing a liner material on a sidewall of an opening are described. An example method includes forming a liner material on a dielectric material of sidewalls of an opening and a bottom surface of an opening and removing the first liner material of the sidewalls of the opening and the bottom surface of the opening using a non-selective etch chemistry. The example method further includes forming a second liner material on the dielectric material of the sidewalls of the opening to avoid contact with the bottom surface of the opening.

公开(公告)号：US09087737B2

公开(公告)日：2015-07-21

申请号：US14456337

申请日：2014-08-11

Applicant: Micron Technology, Inc.

Inventor： Alex Schrinsky ,  Anish Khandekar ,  Pavan Aella ,  Niraj B. Rana

IPC: H01L21/336 ,  H01L27/115 ,  H01L21/3213 ,  H01L29/66 ,  H01L29/788 ,  H01L29/792

CPC classification number: H01L27/11556 ,  H01L21/32134 ,  H01L27/11582 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7889 ,  H01L29/7926

Abstract: Methods are disclosed that include selectively etching diffused regions to form recesses in semiconductor material, and forming charge storage structures in the recesses. Additional embodiments are disclosed.

Abstract translation: 公开了包括选择性地蚀刻扩散区域以在半导体材料中形成凹槽的方法，以及在凹部中形成电荷存储结构。 公开了另外的实施例。