公开(公告)号：US11081166B1

公开(公告)日：2021-08-03

申请号：US17000202

申请日：2020-08-21

Applicant: Micron Technology, Inc.

Inventor： Kevin G. Werhane ,  Jason M. Johnson ,  Yoshinori Fujiwara ,  Tyrel Z. Jensen ,  Daniel S. Miller ,  David E. Jefferson ,  Vivek Kotti

IPC: G11C11/408 ,  G11C11/22

Abstract: Methods, systems, and devices for memory device random option inversion are described. A memory device may use a second set of fuses to selectively invert options associated with a first set of fuses (e.g., blown fuses). The first set of fuses may output a first set of logic states. Option inversion logic circuitry may perform decoding based on a second set of logic states output by the second set of fuses to identify logic states of the second set of logic states that match the first set of logic states. Based on identifying the logic states, the option inversion logic circuitry may select either a logic state of the first set of logic states or an inverted logic state corresponding to the logic state, and store the selected logic state in a latch of the memory device.