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公开(公告)号:US20160104748A1
公开(公告)日:2016-04-14
申请号:US14970602
申请日:2015-12-16
Applicant: Micron Technology, Inc.
Inventor: Marcello Ravasio , Samuele Sciarrillo , Roberto Somaschini , Gabriel L. Donadio
CPC classification number: H01L27/2481 , G11C5/063 , G11C13/0002 , G11C2213/71 , H01L27/2409 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/1608 , H01L45/1666 , H01L45/1675
Abstract: The present disclosure includes memory cell array structures and methods of forming the same. One such array includes a stack structure comprising a memory cell between a first conductive material and a second conductive material. The memory cell can include a select element and a memory element. The array can also include an electrically inactive stack structure located at an edge of the stack structure.
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公开(公告)号:US09773844B2
公开(公告)日:2017-09-26
申请号:US14970602
申请日:2015-12-16
Applicant: Micron Technology, Inc.
Inventor: Marcello Ravasio , Samuele Sciarrillo , Roberto Somaschini , Gabriel L. Donadio
CPC classification number: H01L27/2481 , G11C5/063 , G11C13/0002 , G11C2213/71 , H01L27/2409 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/1608 , H01L45/1666 , H01L45/1675
Abstract: The present disclosure includes memory cell array structures and methods of forming the same. One such array includes a stack structure comprising a memory cell between a first conductive material and a second conductive material. The memory cell can include a select element and a memory element. The array can also include an electrically inactive stack structure located at an edge of the stack structure.
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3.
公开(公告)号:US09246100B2
公开(公告)日:2016-01-26
申请号:US13949315
申请日:2013-07-24
Applicant: Micron Technology, Inc.
Inventor: Marcello Ravasio , Samuele Sciarrillo , Roberto Somaschini , Gabriel L. Donadio
CPC classification number: H01L27/2481 , G11C5/063 , G11C13/0002 , G11C2213/71 , H01L27/2409 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/1608 , H01L45/1666 , H01L45/1675
Abstract: The present disclosure includes memory cell array structures and methods of forming the same. One such array includes a stack structure comprising a memory cell between a first conductive material and a second conductive material. The memory cell can include a select element and a memory element. The array can also include an electrically inactive stack structure located at an edge of the stack structure.
Abstract translation: 本公开包括存储单元阵列结构及其形成方法。 一种这样的阵列包括堆叠结构,其包括在第一导电材料和第二导电材料之间的存储单元。 存储器单元可以包括选择元件和存储元件。 阵列还可以包括位于堆叠结构的边缘处的电惰性堆叠结构。
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4.
公开(公告)号:US20150029775A1
公开(公告)日:2015-01-29
申请号:US13949315
申请日:2013-07-24
Applicant: Micron Technology, Inc.
Inventor: Marcello Ravasio , Samuele Sciarrillo , Roberto Somaschini , Gabriel L. Donadio
CPC classification number: H01L27/2481 , G11C5/063 , G11C13/0002 , G11C2213/71 , H01L27/2409 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/1608 , H01L45/1666 , H01L45/1675
Abstract: The present disclosure includes memory cell array structures and methods of forming the same. One such array includes a stack structure comprising a memory cell between a first conductive material and a second conductive material. The memory cell can include a select element and a memory element. The array can also include an electrically inactive stack structure located at an edge of the stack structure.
Abstract translation: 本公开内容包括存储单元阵列结构及其形成方法。 一种这样的阵列包括堆叠结构,其包括在第一导电材料和第二导电材料之间的存储单元。 存储器单元可以包括选择元件和存储元件。 阵列还可以包括位于堆叠结构的边缘处的电惰性堆叠结构。
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