公开(公告)号：US11714722B2

公开(公告)日：2023-08-01

申请号：US17486260

申请日：2021-09-27

Applicant: Micron Technology, Inc.

Inventor： Yipei Yu ,  Wei Wang ,  Jiangli Zhu ,  Huapeng Guan

IPC: G06F11/14

CPC classification number: G06F11/1446 ,  G06F11/1471 ,  G06F2201/84

Abstract: An example memory sub-system includes one or more memory devices and a processing device, operatively coupled to the one or more memory devices. The processing device is configured to store, on a non-volatile memory device of the one or more memory devices, a snapshot of a logical-to-physical (L2P) table comprising a plurality of L2P table entries, each L2P table entry mapping a logical address defined in a logical address space to a physical address identifying a management unit on a memory device of the one or more memory devices; store, on the non-volatile memory device of the one or more memory devices, a physical-to-logical (P2L) table comprising a plurality of P2L table entries, each L2P table entry mapping a physical address identifying a management unit on a memory device of the one or more memory devices to metadata associated with the management unit; store, on the non-volatile memory device, a list of unallocated MUs; store, on the non-volatile memory device, an L2P update journal including one or more L2P journal entries, wherein each L2P journal entry reflects an update to an L2P table entry of the plurality of L2P table entries, wherein the update has been performed after storing the snapshot of the L2P table; and responsive to detecting a power up event following a power loss event, reconstruct the L2P table using the snapshot of the L2P table, the L2P update journal, the P2L table, and the list of unallocated management units.

公开(公告)号：US12105621B2

公开(公告)日：2024-10-01

申请号：US17930117

申请日：2022-09-07

Applicant: Micron Technology, Inc.

Inventor： Steven R. Narum ,  Huapeng Guan

IPC: G06F12/02 ,  G06F1/3225

CPC classification number: G06F12/0246 ,  G06F1/3225 ,  G06F12/0292 ,  G06F2212/205 ,  G06F2212/7201

Abstract: A memory device may detect a memory operation that updates a level two volatile (L2V) entry stored in an L2V table. Each L2V entry in the L2V table may indicate a mapping between a respective logical block address (LBA) and a respective user data physical address in non-volatile memory. The memory operation may cause a mapping between an LBA indicated in the L2V entry and a user data physical address indicated in the L2V entry to become invalid. The memory device may store, in a volatile memory log, an indication of an LBA region that includes the LBA. The memory device may detect that an L2 transfer condition, associated with the volatile memory log, is satisfied. The memory device may copy, from volatile memory to non-volatile memory, every L2V entry that indicates an LBA included in the LBA region based on detecting that the L2 transfer condition is satisfied.

公开(公告)号：US20220100608A1

公开(公告)日：2022-03-31

申请号：US17486260

申请日：2021-09-27

Applicant: Micron Technology, Inc.

Inventor： Yipei Yu ,  Wei Wang ,  Jiangli Zhu ,  Huapeng Guan

IPC: G06F11/14 ,  G06F12/06

Abstract: An example memory sub-system includes one or more memory devices and a processing device, operatively coupled to the one or more memory devices. The processing device is configured to store, on a non-volatile memory device of the one or more memory devices, a snapshot of a logical-to-physical (L2P) table comprising a plurality of L2P table entries, each L2P table entry mapping a logical address defined in a logical address space to a physical address identifying a management unit on a memory device of the one or more memory devices; store, on the non-volatile memory device of the one or more memory devices, a physical-to-logical (P2L) table comprising a plurality of P2L table entries, each L2P table entry mapping a physical address identifying a management unit on a memory device of the one or more memory devices to metadata associated with the management unit; store, on the non-volatile memory device, a list of unallocated MUs; store, on the non-volatile memory device, an L2P update journal including one or more L2P journal entries, wherein each L2P journal entry reflects an update to an L2P table entry of the plurality of L2P table entries, wherein the update has been performed after storing the snapshot of the L2P table; and responsive to detecting a power up event following a power loss event, reconstruct the L2P table using the snapshot of the L2P table, the L2P update journal, the P2L table, and the list of unallocated management units.