专利检索 ap:("Micron Technology, Inc.") AND inv:"Jeffrey B. Hull" 第 1 页

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发明申请
Vertical Transistor, Integrated Circuitry, Method Of Forming A Vertical Transistor, And Method Of Forming Integrated Circuitry 有权

公开(公告)号：US20220157837A1

公开(公告)日：2022-05-19

申请号：US17589310

申请日：2022-01-31

申请人： Micron Technology, Inc.

发明人： Hung-Wei Liu , Vassil N, Antonov , Ashonita A. Chavan , Darwin Franseda Fan , Jeffrey B. Hull , Anish A. Khandekar , Masihhur R. Laskar , Albert Liao , Xue-Feng Lin , Manuj Nahar , Irina V. Vasilyeva

IPC分类号： H01L27/11514 , H01L27/11507 , H01L27/1159 , H01L27/11597 , H01L29/78 , H01L29/66 , H01L21/223 , H01L29/10

摘要： A method of forming a vertical transistor comprising a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region comprises, in multiple time-spaced microwave annealing steps, microwave annealing at least the channel region. The multiple time-spaced microwave annealing steps reduce average concentration of elemental-form H in the channel region from what it was before start of the multiple time-spaced microwave annealing steps. The reduced average concentration of elemental-form H is 0.005 to less than 1 atomic percent. Structure embodiments are disclosed.