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公开(公告)号:US20240164114A1
公开(公告)日:2024-05-16
申请号:US18522637
申请日:2023-11-29
发明人: Hung-Wei Liu , Vassil N. Antonov , Ashonita A. Chavan , Darwin Franseda Fan , Jeffery B. Hull , Anish A. Khandekar , Masihhur R. Laskar , Albert Liao , Xue-Feng Lin , Manuj Nahar , Irina V. Vasilyeva
IPC分类号: H10B53/20 , H01L21/223 , H01L29/10 , H01L29/66 , H01L29/78 , H10B51/20 , H10B51/30 , H10B53/30
CPC分类号: H10B53/20 , H01L21/223 , H01L29/1037 , H01L29/66666 , H01L29/7827 , H10B51/20 , H10B51/30 , H10B53/30
摘要: A method of forming a vertical transistor comprising a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region comprises, in multiple time-spaced microwave annealing steps, microwave annealing at least the channel region. The multiple time-spaced microwave annealing steps reduce average concentration of elemental-form H in the channel region from what it was before start of the multiple time-spaced microwave annealing steps. The reduced average concentration of elemental-form H is 0.005 to less than 1 atomic percent. Structure embodiments are disclosed.
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公开(公告)号:US20220157837A1
公开(公告)日:2022-05-19
申请号:US17589310
申请日:2022-01-31
发明人: Hung-Wei Liu , Vassil N, Antonov , Ashonita A. Chavan , Darwin Franseda Fan , Jeffrey B. Hull , Anish A. Khandekar , Masihhur R. Laskar , Albert Liao , Xue-Feng Lin , Manuj Nahar , Irina V. Vasilyeva
IPC分类号: H01L27/11514 , H01L27/11507 , H01L27/1159 , H01L27/11597 , H01L29/78 , H01L29/66 , H01L21/223 , H01L29/10
摘要: A method of forming a vertical transistor comprising a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region comprises, in multiple time-spaced microwave annealing steps, microwave annealing at least the channel region. The multiple time-spaced microwave annealing steps reduce average concentration of elemental-form H in the channel region from what it was before start of the multiple time-spaced microwave annealing steps. The reduced average concentration of elemental-form H is 0.005 to less than 1 atomic percent. Structure embodiments are disclosed.
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公开(公告)号:US20220093617A1
公开(公告)日:2022-03-24
申请号:US17027046
申请日:2020-09-21
发明人: Hung-Wei Liu , Vassil N. Antonov , Ashonita A. Chavan , Darwin Franseda Fan , Jeffery B. Hull , Anish A. Khandekar , Masihhur R. Laskar , Albert Liao , Xue-Feng Lin , Manuj Nahar , Irina V. Vasilyeva
IPC分类号: H01L27/11514 , H01L27/11507 , H01L29/78 , H01L21/223 , H01L27/11597 , H01L27/1159 , H01L29/10 , H01L29/66
摘要: A method of forming a vertical transistor comprising a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region comprises, in multiple time-spaced microwave annealing steps, microwave annealing at least the channel region. The multiple time-spaced microwave annealing steps reduce average concentration of elemental-form H in the channel region from what it was before start of the multiple time-spaced microwave annealing steps. The reduced average concentration of elemental-form H is 0.005 to less than 1 atomic percent. Structure embodiments are disclosed.
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公开(公告)号:US11871582B2
公开(公告)日:2024-01-09
申请号:US17589310
申请日:2022-01-31
发明人: Hung-Wei Liu , Vassil N. Antonov , Ashonita A. Chavan , Darwin Franseda Fan , Jeffery B. Hull , Anish A. Khandekar , Masihhur R. Laskar , Albert Liao , Xue-Feng Lin , Manuj Nahar , Irina V. Vasilyeva
IPC分类号: H10B53/20 , H01L29/78 , H01L29/66 , H01L29/10 , H01L21/223 , H10B51/20 , H10B51/30 , H10B53/30
CPC分类号: H10B53/20 , H01L21/223 , H01L29/1037 , H01L29/66666 , H01L29/7827 , H10B51/20 , H10B51/30 , H10B53/30
摘要: A method of forming a vertical transistor comprising a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region comprises, in multiple time-spaced microwave annealing steps, microwave annealing at least the channel region. The multiple time-spaced microwave annealing steps reduce average concentration of elemental-form H in the channel region from what it was before start of the multiple time-spaced microwave annealing steps. The reduced average concentration of elemental-form H is 0.005 to less than 1 atomic percent. Structure embodiments are disclosed.
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公开(公告)号:US11264395B1
公开(公告)日:2022-03-01
申请号:US17027046
申请日:2020-09-21
发明人: Hung-Wei Liu , Vassil N. Antonov , Ashonita A. Chavan , Darwin Franseda Fan , Jeffery B. Hull , Anish A. Khandekar , Masihhur R. Laskar , Albert Liao , Xue-Feng Lin , Manuj Nahar , Irina V. Vasilyeva
IPC分类号: H01L27/11514 , H01L27/11507 , H01L29/78 , H01L29/66 , H01L27/11597 , H01L27/1159 , H01L29/10 , H01L21/223
摘要: A method of forming a vertical transistor comprising a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region comprises, in multiple time-spaced microwave annealing steps, microwave annealing at least the channel region. The multiple time-spaced microwave annealing steps reduce average concentration of elemental-form H in the channel region from what it was before start of the multiple time-spaced microwave annealing steps. The reduced average concentration of elemental-form H is 0.005 to less than 1 atomic percent. Structure embodiments are disclosed.
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