公开(公告)号：US20170062337A1

公开(公告)日：2017-03-02

申请号：US14837978

申请日：2015-08-27

Applicant: Micron Technology, Inc.

Inventor： Matthew Park ,  Adam L. Olson ,  Jixin Yu

IPC: H01L23/528 ,  H01L21/027 ,  H01L21/311 ,  H01L21/3213 ,  H01L27/115 ,  H01L21/768

CPC classification number: H01L21/76897 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/32133 ,  H01L21/32139 ,  H01L21/76804 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76838 ,  H01L21/7685 ,  H01L21/76865 ,  H01L23/5226 ,  H01L23/53295 ,  H01L27/11548 ,  H01L27/11575 ,  H01L27/11582

Abstract: A method of forming a semiconductor device assembly comprises forming tiers comprising conductive structures and insulating structures in a stacked arrangement over a substrate. Portions of the tiers are selectively removed to form a stair step structure comprising a selected number of steps exhibiting different widths corresponding to variances in projected error associated with forming the steps. Contact structures are formed on the steps of the stair step structure. Semiconductor device structures and semiconductor devices are also described.

Abstract translation: 形成半导体器件组件的方法包括在衬底上层叠布置形成包括导电结构和绝缘结构的层。 选择性地移除层的部分以形成阶梯结构，其包括对应于与形成步骤相关联的投影误差的方差显示不同宽度的选定数量的步骤。 在阶梯结构的台阶上形成接触结构。 还描述了半导体器件结构和半导体器件。

公开(公告)号：US20180190587A1

公开(公告)日：2018-07-05

申请号：US15906366

申请日：2018-02-27

Applicant: Micron Technology, Inc.

Inventor： Matthew Park ,  Adam L. Olson ,  Jixin Yu

IPC: H01L23/528 ,  H01L21/3213 ,  H01L21/311 ,  H01L21/768 ,  H01L23/532 ,  H01L23/522

Abstract: A method of forming a semiconductor device assembly comprises forming tiers comprising conductive structures and insulating structures in a stacked arrangement over a substrate. Portions of the tiers are selectively removed to form a stair step structure comprising a selected number of steps exhibiting different widths corresponding to variances in projected error associated with forming the steps. Contact structures are formed on the steps of the stair step structure. Semiconductor device structures and semiconductor devices are also described.

公开(公告)号：US10672657B2

公开(公告)日：2020-06-02

申请号：US15906366

申请日：2018-02-27

Applicant: Micron Technology, Inc.

Inventor： Matthew Park ,  Adam L. Olson ,  Jixin Yu

IPC: H01L21/76 ,  H01L23/52 ,  H01L21/768 ,  H01L21/311 ,  H01L21/3213 ,  H01L23/522 ,  H01L23/532 ,  H01L27/11575 ,  H01L27/11582 ,  H01L27/11548

Abstract: A method of forming a semiconductor device assembly comprises forming tiers comprising conductive structures and insulating structures in a stacked arrangement over a substrate. Portions of the tiers are selectively removed to form a stair step structure comprising a selected number of steps exhibiting different widths corresponding to variances in projected error associated with forming the steps. Contact structures are formed on the steps of the stair step structure. Semiconductor device structures and semiconductor devices are also described.

公开(公告)号：US10453748B2

公开(公告)日：2019-10-22

申请号：US14837978

申请日：2015-08-27

Applicant: Micron Technology, Inc.

Inventor： Matthew Park ,  Adam L. Olson ,  Jixin Yu

IPC: H01L21/76 ,  H01L23/52 ,  H01L23/532 ,  H01L21/768 ,  H01L21/311 ,  H01L21/3213 ,  H01L23/522 ,  H01L27/11575 ,  H01L27/11582 ,  H01L27/11548

Abstract: A method of forming a semiconductor device assembly comprises forming tiers comprising conductive structures and insulating structures in a stacked arrangement over a substrate. Portions of the tiers are selectively removed to form a stair step structure comprising a selected number of steps exhibiting different widths corresponding to variances in projected error associated with forming the steps. Contact structures are formed on the steps of the stair step structure. Semiconductor device structures and semiconductor devices are also described.