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公开(公告)号：US10147487B2
公开(公告)日：2018-12-04
申请号：US15791271
申请日：2017-10-23
Applicant: Micron Technology, Inc.
Inventor： Makoto Kitagawa , Kerry Tedrow
Abstract: Memory sense amplifiers and memory verification methods are described. According to one aspect, a memory sense amplifier includes a first input coupled with a memory element of a memory cell, wherein the memory element has different memory states at different moments in time, a second input configured to receive a reference signal, modification circuitry configured to provide a data signal at the first input from the memory element having a plurality of different voltages corresponding to respective ones of different memory states of the memory cell at the different moments in time, and comparison circuitry coupled with the modification circuitry and configured to compare the data signal and the reference signal at the different moments in time and to provide an output signal indicative of the memory state of the memory cell at the different moments in time as a result of the comparison to implement a plurality of verify operations of the memory states of the memory cell at the different moments in time.
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公开(公告)号：US09311999B2
公开(公告)日：2016-04-12
申请号：US14478894
申请日：2014-09-05
Applicant: Micron Technology, Inc.
Inventor： Makoto Kitagawa , Kerry Tedrow
CPC classification number: G11C13/0064 , G11C7/062 , G11C11/5614 , G11C13/0011 , G11C13/004 , G11C2013/0054 , G11C2213/79
Abstract: Memory sense amplifiers and memory verification methods are described. According to one aspect, a memory sense amplifier includes a first input coupled with a memory element of a memory cell, wherein the memory element has different memory states at different moments in time, a second input configured to receive a reference signal, modification circuitry configured to provide a data signal at the first input from the memory element having a plurality of different voltages corresponding to respective ones of different memory states of the memory cell at the different moments in time, and comparison circuitry coupled with the modification circuitry and configured to compare the data signal and the reference signal at the different moments in time and to provide an output signal indicative of the memory state of the memory cell at the different moments in time as a result of the comparison to implement a plurality of verify operations of the memory states of the memory cell at the different moments in time.
Abstract translation: 描述了存储器读出放大器和存储器验证方法。 根据一个方面，存储器读出放大器包括与存储器单元的存储器元件耦合的第一输入，其中存储元件在不同时刻具有不同的存储器状态，被配置为接收参考信号的第二输入，配置的修改电路 在来自存储元件的第一输入处提供数据信号，该数据信号具有与不同时刻的存储单元的不同存储状态相对应的多个不同电压，以及比较电路，与修改电路耦合并被配置为比较 在不同时刻的数据信号和参考信号，并且作为比较的结果提供指示不同时刻的存储器单元的存储状态的输出信号，以实现存储器的多个验证操作 在不同时刻的存储单元的状态。
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公开(公告)号：US20150070972A1
公开(公告)日：2015-03-12
申请号：US14478894
申请日：2014-09-05
Applicant: Micron Technology, Inc.
Inventor： Makoto Kitagawa , Kerry Tedrow
IPC: G11C13/00
CPC classification number: G11C13/0064 , G11C7/062 , G11C11/5614 , G11C13/0011 , G11C13/004 , G11C2013/0054 , G11C2213/79
Abstract: Memory sense amplifiers and memory verification methods are described. According to one aspect, a memory sense amplifier includes a first input coupled with a memory element of a memory cell, wherein the memory element has different memory states at different moments in time, a second input configured to receive a reference signal, modification circuitry configured to provide a data signal at the first input from the memory element having a plurality of different voltages corresponding to respective ones of different memory states of the memory cell at the different moments in time, and comparison circuitry coupled with the modification circuitry and configured to compare the data signal and the reference signal at the different moments in time and to provide an output signal indicative of the memory state of the memory cell at the different moments in time as a result of the comparison to implement a plurality of verify operations of the memory states of the memory cell at the different moments in time.
Abstract translation: 描述了存储器读出放大器和存储器验证方法。 根据一个方面，存储器读出放大器包括与存储器单元的存储器元件耦合的第一输入，其中存储元件在不同时刻具有不同的存储器状态，被配置为接收参考信号的第二输入，配置的修改电路 在来自存储元件的第一输入处提供数据信号，该数据信号具有与不同时刻的存储单元的不同存储状态相对应的多个不同电压，以及比较电路，与修改电路耦合并被配置为比较 在不同时刻的数据信号和参考信号，并且作为比较的结果提供指示不同时刻的存储器单元的存储状态的输出信号，以实现存储器的多个验证操作 在不同时刻的存储单元的状态。
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Patent Agency Ranking
公开(公告)号：US20160225444A1
公开(公告)日：2016-08-04
申请号：US15096135
申请日：2016-04-11
Applicant: Micron Technology, Inc.
Inventor： Makoto Kitagawa , Kerry Tedrow
IPC: G11C13/00
CPC classification number: G11C13/0064 , G11C7/062 , G11C11/5614 , G11C13/0011 , G11C13/004 , G11C2013/0054 , G11C2213/79
Abstract: Memory sense amplifiers and memory verification methods are described. According to one aspect, a memory sense amplifier includes a first input coupled with a memory element of a memory cell, wherein the memory element has different memory states at different moments in time, a second input configured to receive a reference signal, modification circuitry configured to provide a data signal at the first input from the memory element having a plurality of different voltages corresponding to respective ones of different memory states of the memory cell at the different moments in time, and comparison circuitry coupled with the modification circuitry and configured to compare the data signal and the reference signal at the different moments in time and to provide an output signal indicative of the memory state of the memory cell at the different moments in time as a result of the comparison to implement a plurality of verify operations of the memory states of the memory cell at the different moments in time.
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公开(公告)号：US10748613B2
公开(公告)日：2020-08-18
申请号：US16176390
申请日：2018-10-31
Applicant: Micron Technology, Inc.
Inventor： Makoto Kitagawa , Kerry Tedrow
Abstract: Memory sense amplifiers and memory verification methods are described. According to one aspect, a memory sense amplifier includes a first input coupled with a memory element of a memory cell, wherein the memory element has different memory states at different moments in time, a second input configured to receive a reference signal, modification circuitry configured to provide a data signal at the first input from the memory element having a plurality of different voltages corresponding to respective ones of different memory states of the memory cell at the different moments in time, and comparison circuitry coupled with the modification circuitry and configured to compare the data signal and the reference signal at the different moments in time and to provide an output signal indicative of the memory state of the memory cell at the different moments in time as a result of the comparison to implement a plurality of verify operations of the memory states of the memory cell at the different moments in time.
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公开(公告)号：US20190066783A1
公开(公告)日：2019-02-28
申请号：US16176390
申请日：2018-10-31
Applicant: Micron Technology, Inc.
Inventor： Makoto Kitagawa , Kerry Tedrow
CPC classification number: G11C13/0064 , G11C7/062 , G11C11/5614 , G11C13/0011 , G11C13/004 , G11C2013/0054 , G11C2213/79
Abstract: Memory sense amplifiers and memory verification methods are described. According to one aspect, a memory sense amplifier includes a first input coupled with a memory element of a memory cell, wherein the memory element has different memory states at different moments in time, a second input configured to receive a reference signal, modification circuitry configured to provide a data signal at the first input from the memory element having a plurality of different voltages corresponding to respective ones of different memory states of the memory cell at the different moments in time, and comparison circuitry coupled with the modification circuitry and configured to compare the data signal and the reference signal at the different moments in time and to provide an output signal indicative of the memory state of the memory cell at the different moments in time as a result of the comparison to implement a plurality of verify operations of the memory states of the memory cell at the different moments in time.
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公开(公告)号：US20180047446A1
公开(公告)日：2018-02-15
申请号：US15791271
申请日：2017-10-23
Applicant: Micron Technology, Inc.
Inventor： Makoto Kitagawa , Kerry Tedrow
CPC classification number: G11C13/0064 , G11C7/062 , G11C11/5614 , G11C13/0011 , G11C13/004 , G11C2013/0054 , G11C2213/79
Abstract: Memory sense amplifiers and memory verification methods are described. According to one aspect, a memory sense amplifier includes a first input coupled with a memory element of a memory cell, wherein the memory element has different memory states at different moments in time, a second input configured to receive a reference signal, modification circuitry configured to provide a data signal at the first input from the memory element having a plurality of different voltages corresponding to respective ones of different memory states of the memory cell at the different moments in time, and comparison circuitry coupled with the modification circuitry and configured to compare the data signal and the reference signal at the different moments in time and to provide an output signal indicative of the memory state of the memory cell at the different moments in time as a result of the comparison to implement a plurality of verify operations of the memory states of the memory cell at the different moments in time.
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8.发明授权公开(公告)号：US09799398B2
公开(公告)日：2017-10-24
申请号：US15096135
申请日：2016-04-11
Applicant: Micron Technology, Inc.
Inventor： Makoto Kitagawa , Kerry Tedrow
CPC classification number: G11C13/0064 , G11C7/062 , G11C11/5614 , G11C13/0011 , G11C13/004 , G11C2013/0054 , G11C2213/79
Abstract: Memory sense amplifiers and memory verification methods are described. According to one aspect, a memory sense amplifier includes a first input coupled with a memory element of a memory cell, wherein the memory element has different memory states at different moments in time, a second input configured to receive a reference signal, modification circuitry configured to provide a data signal at the first input from the memory element having a plurality of different voltages corresponding to respective ones of different memory states of the memory cell at the different moments in time, and comparison circuitry coupled with the modification circuitry and configured to compare the data signal and the reference signal at the different moments in time and to provide an output signal indicative of the memory state of the memory cell at the different moments in time as a result of the comparison to implement a plurality of verify operations of the memory states of the memory cell at the different moments in time.
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