-
公开(公告)号：US20160274812A1
公开(公告)日：2016-09-22
申请号：US15171677
申请日：2016-06-02
Applicant: Micron Technology, Inc.
Inventor： Krishnam R. Datla , William H. Radke , Robin Sarno , Laszlo Borbely-Bartis , Ken Kannampuzha
CPC classification number: G06F3/0625 , G06F3/0653 , G06F3/0688 , G11C5/14 , G11C16/30
Abstract: The present disclosure includes apparatuses and methods for power consumption control. A number of embodiments include determining power consumption information for each phase in a combination of phases of a command, and authorizing execution of at least one of the phases in the combination based, at least partially, on the power consumption information determined for the at least one of the phases.
-
公开(公告)号：US09766830B2
公开(公告)日：2017-09-19
申请号：US15171677
申请日：2016-06-02
Applicant: Micron Technology, Inc.
Inventor： Krishnam R. Datla , William H. Radke , Robin Sarno , Laszlo Borbely-Bartis , Ken Kannampuzha
CPC classification number: G06F3/0625 , G06F3/0653 , G06F3/0688 , G11C5/14 , G11C16/30
Abstract: The present disclosure includes apparatuses and methods for power consumption control. A number of embodiments include determining power consumption information for each phase in a combination of phases of a command, and authorizing execution of at least one of the phases in the combination based, at least partially, on the power consumption information determined for the at least one of the phases.
-
Patent Agency Ranking
公开(公告)号：US20150098291A1
公开(公告)日：2015-04-09
申请号：US14482408
申请日：2014-09-10
Applicant: Micron Technology, Inc.
Inventor： Krishnam R. Datla , William H. Radke , Robin Sarno , Laszlo Borbely-Bartis , Ken Kannampuzha
IPC: G11C5/14
CPC classification number: G06F3/0625 , G06F3/0653 , G06F3/0688 , G11C5/14 , G11C16/30
Abstract: The present disclosure includes apparatuses and methods for power consumption control. A number of embodiments include determining power consumption information for each phase in a combination of phases of a command, and authorizing execution of at least one of the phases in the combination based, at least partially, on the power consumption information determined for the at least one of the phases.
Abstract translation: 本公开包括用于功耗控制的装置和方法。 多个实施例包括在命令的相位组合中确定每个阶段的功率消耗信息，并且至少部分地基于至少为至少确定的功耗信息授权执行组合中的至少一个相位的功率消耗信息 其中一个阶段。
-
公开(公告)号：US09368163B2
公开(公告)日：2016-06-14
申请号：US14482408
申请日：2014-09-10
Applicant: Micron Technology, Inc.
Inventor： Krishnam R. Datla , William H. Radke , Robin Sarno , Laszlo Borbely-Bartis , Ken Kannampuzha
IPC: G11C5/14
CPC classification number: G06F3/0625 , G06F3/0653 , G06F3/0688 , G11C5/14 , G11C16/30
Abstract: The present disclosure includes apparatuses and methods for power consumption control. A number of embodiments include determining power consumption information for each phase in a combination of phases of a command, and authorizing execution of at least one of the phases in the combination based, at least partially, on the power consumption information determined for the at least one of the phases.
Abstract translation: 本公开包括用于功耗控制的装置和方法。 多个实施例包括在命令的相位组合中确定每个阶段的功率消耗信息，并且至少部分地基于至少为至少确定的功耗信息授权执行组合中的至少一个相位的功率消耗信息 其中一个阶段。
-
公开(公告)号：US09342371B2
公开(公告)日：2016-05-17
申请号：US14278510
申请日：2014-05-15
Applicant: Micron Technology, Inc.
Inventor： Neal A. Galbo , Victor Y. Tsai , William H. Radke , Krishnam R. Datla
CPC classification number: G06F9/5077 , G06F3/062 , G06F3/0644 , G06F3/0679 , G06F9/4401 , G06F12/0246 , G06F2212/7206
Abstract: The present disclosure includes boot partitions in memory devices and systems, and methods associated therewith. One or more embodiments include an array of memory cells, wherein the array includes a boot partition and a number of additional partitions. Sequential logical unit identifiers are associated with the additional partitions, and a logical unit identifier that is not in sequence with the sequential logical unit identifiers is associated with the boot partition.
-
公开(公告)号：US20140289505A1
公开(公告)日：2014-09-25
申请号：US14278510
申请日：2014-05-15
Applicant: Micron Technology, Inc.
Inventor： Neal A. Galbo , Victor Y. Tsai , William H. Radke , Krishnam R. Datla
IPC: G06F9/44
CPC classification number: G06F9/5077 , G06F3/062 , G06F3/0644 , G06F3/0679 , G06F9/4401 , G06F12/0246 , G06F2212/7206
Abstract: The present disclosure includes boot partitions in memory devices and systems, and methods associated therewith. One or more embodiments include an array of memory cells, wherein the array includes a boot partition and a number of additional partitions. Sequential logical unit identifiers are associated with the additional partitions, and a logical unit identifier that is not in sequence with the sequential logical unit identifiers is associated with the boot partition.
Abstract translation: 本公开包括存储器设备和系统中的引导分区以及与其相关联的方法。 一个或多个实施例包括存储器单元的阵列，其中阵列包括引导分区和多个附加分区。 顺序逻辑单元标识符与附加分区相关联，并且与顺序逻辑单元标识符不一致的逻辑单元标识符与引导分区相关联。
-
公开(公告)号：US20130275713A1
公开(公告)日：2013-10-17
申请号：US13868646
申请日：2013-04-23
Applicant: Micron Technology, Inc.
Inventor： Neal A. Galbo , Victor Y. Tsai , William H. Radke , Krishnam R. Datla
IPC: G06F9/50
CPC classification number: G06F9/5077 , G06F3/062 , G06F3/0644 , G06F3/0679 , G06F9/4401 , G06F12/0246 , G06F2212/7206
Abstract: The present disclosure includes boot partitions in memory devices and systems, and methods associated therewith. One or more embodiments include an array of memory cells, wherein the array includes a boot partition and a number of additional partitions. Sequential logical unit identifiers are associated with the additional partitions, and a logical unit identifier that is not in sequence with the sequential logical unit identifiers is associated with the boot partition.
Abstract translation: 本公开包括存储器设备和系统中的引导分区以及与其相关联的方法。 一个或多个实施例包括存储器单元的阵列，其中阵列包括引导分区和多个附加分区。 顺序逻辑单元标识符与附加分区相关联，并且与顺序逻辑单元标识符不一致的逻辑单元标识符与引导分区相关联。
-
-
-
-
-
-
Search Results
7
records
(took 0.014 seconds)
