公开(公告)号：US11605421B2

公开(公告)日：2023-03-14

申请号：US16932567

申请日：2020-07-17

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Katsuhiro Kitagawa ,  Toru Ishikawa ,  Minari Arai ,  Nobuki Takahashi

IPC: G11C7/12 ,  G11C11/4091 ,  G11C11/4096 ,  G11C11/4074 ,  G11C11/4076 ,  G11C7/06 ,  G11C7/10 ,  G11C8/08

Abstract: Disclosed herein is an apparatus that includes first and second digit lines, a sense amplifier configured to amplify a potential difference between the first and second digit lines, a driver circuit configured to drive each of the first and second digit lines to different one of first and second logic levels from each other, a first transistor coupled between the driver circuit and the first digit line, a second transistor coupled between the driver circuit and the second digit line, and a control circuit configured to supply a first potential to control electrodes of the first and second transistors in response to a write command, and supply a second potential different from the first potential to the control electrodes of the first and second transistors in response to a read command.

公开(公告)号：US20240386942A1

公开(公告)日：2024-11-21

申请号：US18635854

申请日：2024-04-15

Applicant: Micron Technology, Inc.

Inventor： Nobuki Takahashi ,  Kohei Nakamura

IPC: G11C11/4093 ,  H03H11/04

Abstract: An example apparatus includes a passgate circuit between first and second nodes, the passgate circuit having a plurality of transistors at least two of which are operatively connected in parallel in a first mode and operatively connected in series in a second mode. The plurality of transistors may include first and second transistors coupled in parallel between the first and second nodes and controlled in common by a first control signal activated in the first mode. The plurality of transistors may further include third and fourth transistors connected in series between the first and second nodes and controlled in common by a second control signal activated in the second mode.

公开(公告)号：US11936377B2

公开(公告)日：2024-03-19

申请号：US17741299

申请日：2022-05-10

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Shuichi Murai ,  Nobuki Takahashi

IPC: H03K19/00 ,  G11C7/10

CPC classification number: H03K19/0005 ,  G11C7/1057 ,  G11C7/1063 ,  G11C7/1084 ,  G11C7/109

Abstract: Apparatuses including an impedance code selector are disclosed. An example apparatus according to the disclosure includes an impedance calibration circuit, an impedance code selector and a driver circuit in a data input/output circuit. The impedance calibration circuit provides a first impedance code. The impedance code selector provides either the first impedance code or a second impedance code. The driver circuit receives either the first impedance code or the second impedance code from the impedance code selector.

公开(公告)号：US20220020422A1

公开(公告)日：2022-01-20

申请号：US16932567

申请日：2020-07-17

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Katsuhiro Kitagawa ,  Toru Ishikawa ,  Minari Arai ,  Nobuki Takahashi

IPC: G11C11/4091 ,  G11C11/4074 ,  G11C11/4096

Abstract: Disclosed herein is an apparatus that includes first and second digit lines, a sense amplifier configured to amplify a potential difference between the first and second digit lines, a driver circuit configured to drive each of the first and second digit lines to different one of first and second logic levels from each other, a first transistor coupled between the driver circuit and the first digit line, a second transistor coupled between the driver circuit and the second digit line, and a control circuit configured to supply a first potential to control electrodes of the first and second transistors in response to a write command, and supply a second potential different from the first potential to the control electrodes of the first and second transistors in response to a read command.