公开(公告)号：US10236301B1

公开(公告)日：2019-03-19

申请号：US15890503

申请日：2018-02-07

Applicant: Micron Technology, Inc.

Inventor： Collin Howder ,  Ryan M. Meyer ,  Chet E. Carter

IPC: H01L27/11524 ,  H01L27/11582 ,  H01L27/11556 ,  H01L27/1157 ,  H01L23/522 ,  H01L21/02 ,  H01L23/532 ,  H01L21/768 ,  H01L21/3205

Abstract: A method of forming an array of elevationally-extending strings of memory cells comprises forming conductively-doped semiconductor material directly above and electrically coupled to metal material. A stack comprising vertically-alternating insulative tiers and wordline tiers is formed directly above the conductively-doped semiconductor material. Horizontally-elongated trenches are formed through the stack to the conductively-doped semiconductor material. The conductively-doped semiconductor material is oxidized through the trenches to form an oxide therefrom that is directly above the metal material. Transistor channel material is provided to extend elevationally along the alternating tiers. The wordline tiers are provided to comprise control-gate material having terminal ends corresponding to control-gate regions of individual memory cells. Charge-storage material is between the transistor channel material and the control-gate regions. Insulative charge-passage material is between the transistor channel material and the charge-storage material. A charge-blocking region is between the charge-storage material and individual of the control-gate regions.

公开(公告)号：US20190198526A1

公开(公告)日：2019-06-27

申请号：US16272547

申请日：2019-02-11

Applicant: Micron Technology, Inc.

Inventor： Collin Howder ,  Ryan M. Meyer ,  Chet E. Carter

IPC: H01L27/11582 ,  H01L23/532 ,  H01L21/02 ,  H01L21/3205 ,  H01L21/768 ,  H01L27/11524 ,  H01L23/522 ,  H01L27/1157 ,  H01L27/11556

CPC classification number: H01L27/11582 ,  H01L21/02164 ,  H01L21/02238 ,  H01L21/32055 ,  H01L21/32105 ,  H01L21/76834 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/53271 ,  H01L23/5329 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157

Abstract: A method of forming an array of elevationally-extending strings of memory cells comprises forming conductively-doped semiconductor material directly above and electrically coupled to metal material. A stack comprising vertically-alternating insulative tiers and wordline tiers is formed directly above the conductively-doped semiconductor material. Horizontally-elongated trenches are formed through the stack to the conductively-doped semiconductor material. The conductively-doped semiconductor material is oxidized through the trenches to form an oxide therefrom that is directly above the metal material. Transistor channel material is provided to extend elevationally along the alternating tiers. The wordline tiers are provided to comprise control-gate material having terminal ends corresponding to control-gate regions of individual memory cells. Charge-storage material is between the transistor channel material and the control-gate regions. Insulative charge-passage material is between the transistor channel material and the charge-storage material. A charge-blocking region is between the charge-storage material and individual of the control-gate regions.