Self-aligned PECVD etch mask
    1.
    发明申请

    公开(公告)号:US20020192976A1

    公开(公告)日:2002-12-19

    申请号:US10217719

    申请日:2002-08-13

    Abstract: A method for forming an etched feature in a substrate such as an insulator layer of a semiconductor wafer is provided. In one embodiment, the method includes initially etching a substrate layer using a photoresist or other masking layer to form the etched feature (e.g., opening) to a selected depth, and depositing a self-aligning mask layer for a continued etch of the formed feature. In another embodiment of the method, the self-aligned mask is deposited onto a substrate having an etched opening or other feature, to protect the upper surface and corners of the substrate and sidewalls of the feature while the bottom portion of the opening is cleaned or material at the bottom portion of the opening is removed. The present methods utilize the height difference between the bottom portion of the feature and the surface of the substrate to selectively deposit a self-aligning mask layer relative to a pre-formed opening or other feature, for example, to extend an opening to a depth that an original photomask thickness cannot support.

    Method to eliminate striations and surface roughness caused by dry etch

    公开(公告)号:US20030162395A1

    公开(公告)日:2003-08-28

    申请号:US10382019

    申请日:2003-03-05

    Inventor: Shane J. Trapp

    CPC classification number: H01L21/31116 H01L21/31144

    Abstract: A plasma etch process for forming a high aspect ratio contact opening through a silicon oxide layer is disclosed. The silicon oxide layer is plasma etched using etch gases that include at least one organic fluorocarbon gas. At least one etch gas is used that includes one or more nitrogen-comprising gases to deposit a surface polymeric material during the etching for maintaining a masking layer over the silicon oxide layer. The method of the invention achieves a complete and anistropic etching of a contact opening having a high aspect ratio and the desired dimensions.

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