公开(公告)号：US20230282607A1

公开(公告)日：2023-09-07

申请号：US18111525

申请日：2023-02-17

Applicant: Micron Technology, Inc.

Inventor： Ting Yi Lin ,  Brandon P. Wirz

IPC: H01L23/00 ,  H01L25/065

CPC classification number: H01L24/33 ,  H01L25/0657 ,  H01L24/05 ,  H01L24/06 ,  H01L24/16 ,  H01L24/14 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/30 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/16145 ,  H01L2224/14132 ,  H01L2224/14181 ,  H01L2224/14517 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/06517 ,  H01L2224/2919 ,  H01L2924/0665 ,  H01L2224/30134 ,  H01L2224/29034 ,  H01L2224/32145 ,  H01L2224/33181 ,  H01L2224/3303 ,  H01L2224/81024 ,  H01L2224/81815 ,  H01L2224/8113 ,  H01L2224/81065 ,  H01L2224/81203 ,  H01L2224/8313 ,  H01L2224/83862 ,  H01L2924/3511 ,  H01L2224/83951 ,  H01L2224/92125 ,  H01L2224/92225

Abstract: A semiconductor device assembly includes a die stack, a plurality of thermoset regions, and underfill material. The die stack includes at least first and second dies that each have a plurality of conductive interconnect elements on upper surfaces. A portion of the interconnect elements are connected to through-silicon vias that extend between the upper surfaces and lower surfaces of the associated dies. The plurality of thermoset regions each comprise a thin layer of thermoset material extending from the lower surface of the second die to the upper surface of the first die, and are laterally-spaced and discrete from each other. Each of the thermoset regions extends to fill an area between a plurality of adjacent interconnect elements of the first die. The underfill material fills remaining open areas between the interconnect elements of the first die.