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公开(公告)号:US20240063165A1
公开(公告)日:2024-02-22
申请号:US17890734
申请日:2022-08-18
Applicant: Micron Technology, Inc.
Inventor: Ramesh NALLAVELLI , Nagavenkata Varaprasad NUNE , Yeow Chon ONG , Hong Wan NG
IPC: H01L23/00 , C09J9/02 , H01L25/065
CPC classification number: H01L24/32 , C09J9/02 , H01L24/29 , H01L25/0652 , H01L25/0657 , C09J2203/326 , C09J2301/314 , H01L24/73 , H01L24/16 , H01L2224/16145 , H01L2224/73204 , H01L2224/13193 , H01L2924/1434 , H01L2924/07811 , H01L2924/07812 , H01L2224/32145 , H01L2224/2919 , H01L2224/29193 , H01L2224/29076 , H01L2224/2908 , H01L2224/29013 , H01L2225/06524 , H01L2225/06513 , H01L24/13
Abstract: Implementations described herein relate to various semiconductor device assemblies. In some implementations, an adhesive assembly configured for semiconductor die attachment includes one or more adhesive films capable of semiconductor die attachment, and one or more conductive elements embedded in the one or more adhesive films.
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公开(公告)号:US20240145457A1
公开(公告)日:2024-05-02
申请号:US18050099
申请日:2022-10-27
Applicant: Micron Technology, Inc.
Inventor: Faxing CHE , Yeow Chon ONG , Wei YU , Ling PAN
IPC: H01L25/18 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/31 , H01L23/498 , H01L23/538 , H01L25/00
CPC classification number: H01L25/18 , H01L21/4857 , H01L21/568 , H01L23/3128 , H01L23/49811 , H01L23/5383 , H01L24/16 , H01L24/32 , H01L24/73 , H01L25/50 , H01L24/48 , H01L2224/16225 , H01L2224/32225 , H01L2224/48147 , H01L2224/48227 , H01L2224/73204
Abstract: Implementations described herein relate to various semiconductor device assemblies. In some implementations, a semiconductor device assembly may include a controller, a first mold compound surrounding the controller, a plurality of semiconductor dies, a second mold compound surrounding the plurality of semiconductor dies, and one or more through-mold interconnects electrically coupling the controller to the plurality of semiconductor dies.
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公开(公告)号:US20250096046A1
公开(公告)日:2025-03-20
申请号:US18783279
申请日:2024-07-24
Applicant: Micron Technology, Inc.
Inventor: Faxing CHE , Chong Leong GAN , Yeow Chon ONG , Hong Wan NG
IPC: H01L21/66 , H01L23/00 , H01L23/31 , H01L25/065
Abstract: Implementations described herein relate to techniques and apparatuses related to a structure that may be used for characterizing properties related to an interfacial adhesion strength between an epoxy mold compound and a vertical edge of a semiconductor die included in a semiconductor die package. The techniques and apparatuses may be used to provide a more comprehensive understanding of interfacial adhesion strengths within the semiconductor die package relative to techniques available in semiconductor industry standards.
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