公开(公告)号：US20230345721A1

公开(公告)日：2023-10-26

申请号：US17660767

申请日：2022-04-26

Applicant: Micron Technology, Inc.

Inventor： Frank Speetjens ,  Yucheng Wang ,  Brendan Flynn ,  S M Istiaque Hossain ,  Tom J. John ,  Jeremy Adams

IPC: H01L27/11582

CPC classification number: H01L27/11582

Abstract: A microelectronic device includes tiers of alternating dielectric and conductive materials, a cap oxide material vertically adjacent to the tiers, and pillars extending vertically through the tiers. The cap oxide material is formulated to exhibit a different etch rate relative to an etch rate of the oxide material of the tiers. Additional microelectronic devices, microelectronic systems, and methods of forming a microelectronic device are also disclosed.

公开(公告)号：US20240047346A1

公开(公告)日：2024-02-08

申请号：US17880444

申请日：2022-08-03

Applicant: Micron Technology, Inc.

Inventor： Rutuparna Narulkar ,  Chandra Tiwari ,  Dmitry Mikulik ,  Erica A. Ellingson ,  Yucheng Wang ,  Mathew Thomas

IPC: H01L23/522 ,  H01L23/535 ,  H01L27/11556 ,  H01L27/11582

CPC classification number: H01L23/5228 ,  H01L23/535 ,  H01L27/11556 ,  H01L27/11582

Abstract: Memory circuitry comprising strings of memory cells comprises a stack comprising vertically-alternating insulative tiers and conductive tiers. Channel-material strings of memory cells extend through the insulative tiers and the conductive tiers in a memory-array region. The insulative tiers and the conductive tiers extend from the memory-array region into a stair-step region. The stair-step region comprises a cavity comprising a flight of stairs. A lining has a specific resistance of at least 1×104 ohm·m at 20° C. atop treads of the stairs of the flight of stairs. Individual of the treads comprise conducting material of one of the conductive tiers. The lining comprises at least one of (a), (b), (c), and (d), where: (a): M1xM2yOz having a specific resistance of at least 1×104 ohm·m at 20° C. and where M1 and M2 are each a different one of Hf, Zr, Al, Ta, Sc, and Y; “z” is greater than zero; and at least one of “x” and “y” is greater than zero; (b) BtCwOv having a specific resistance of at least 1×104 ohm·m at 20° C. and where each of “t” and “v” is greater than zero (c): BrCs having a specific resistance of at least 1×104 ohm·m at 20° C. and where each of “r” and “s” is greater than zero; and (d): BkChNp having a specific resistance of at least 1×104 ohm·m at 20° C. and where each of “k” and “p” is greater than zero. Insulative material in the cavity is directly above the lining that comprises the at least one of the (a), the (b), the (c), and the (d). Conductive vias extend through the insulative material and the lining that comprises the at least one of the (a), the (b), the (c), and the (d). Individual of the conductive vias are directly above and directly against the conducting material of one of the individual treads. Methods are disclosed.