-
公开(公告)号:US11740819B2
公开(公告)日:2023-08-29
申请号:US17486420
申请日:2021-09-27
Applicant: Micron Technology, Inc.
Inventor: Zhao Cui , Eric Kwok Fung Yuen , Guan Zhong Wang , Xinghui Duan , Hua Chen Li
CPC classification number: G06F3/064 , G06F3/0604 , G06F3/0679 , G06F12/0246 , G06F2212/7201
Abstract: Devices and techniques for variable width superblock addressing are described herein. A superblock width, specified in number of planes, is obtained. A superblock entry is created in a translation table of a NAND device. Here, the superblock entry may include a set of blocks, from the NAND device, that have the same block indexes across multiple die of the NAND device. The number of unique block indexes are equal to the number of planes and in different planes. A request, received from a requesting entity, is performed using the superblock entry. Performing the request includes providing a single instruction to multiple die of the NAND device and multiple data segments. Here, a data segment corresponds to a block in the set of blocks specified by a tuple of block index and die. A result of the request is then returned to the requesting entity.
-
公开(公告)号:US11341041B2
公开(公告)日:2022-05-24
申请号:US16940015
申请日:2020-07-27
Applicant: Micron Technology, Inc.
Inventor: Zhao Cui , Eric Kwok Fung Yuen , Guan Zhong Wang , Xinghui Duan , Giuseppe D'Eliseo , Giuseppe Ferrari
IPC: G06F12/02 , G06F12/0873
Abstract: Devices and techniques for synchronizing NAND logical-to-physical table region tracking are described herein. Table region data structures for physical blocks are maintained. These structures include logical-to-physical (L2P) mapping table portions that point to the respective physical blocks. When garbage collection is performed on a block, table region structures for that block, and another (e.g., the next block to be garbage collected) are read to avoid loading L2P table regions that do not point to the block. If any of the read portions of the L2P table region fail to point to either the block or the other block, these L2P table portions are removed from the loaded table region data structures.
-
公开(公告)号:US11132136B2
公开(公告)日:2021-09-28
申请号:US16077175
申请日:2017-12-13
Applicant: Micron Technology, Inc.
Inventor: Zhao Cui , Eric Kwok Fung Yuen , Guan Zhong Wang , Xinghui Duan , Hua Chen Li
Abstract: Devices and techniques for variable width superblock addressing are described herein. A superblock width, specified in number of planes, is obtained. A superblock entry is created in a translation table of a NAND device. Here, the superblock entry may include a set of blocks, from the NAND device, that have the same block indexes across multiple die of the NAND device. The number of unique block indexes are equal to the number of planes and in different planes. A request, received from a requesting entity, is performed using the superblock entry. Performing the request includes providing a single instruction to multiple die of the NAND device and multiple data segments. Here, a data segment corresponds to a block in the set of blocks specified by a tuple of block index and die. A result of the request is then returned to the requesting entity.
-
公开(公告)号:US10725904B2
公开(公告)日:2020-07-28
申请号:US16075543
申请日:2017-12-13
Applicant: Micron Technology, Inc.
Inventor: Zhao Cui , Eric Kwok Fung Yuen , Guan Zhong Wang , Xinghui Duan , Giuseppe D'Eliseo , Giuseppe Ferrari
IPC: G06F12/02 , G06F12/0873
Abstract: Devices and techniques for synchronizing NAND logical-to-physical table region tracking are described herein. Table region data structures for physical blocks are maintained. These structures include logical-to-physical (L2P) mapping table portions that point to the respective physical blocks. When garbage collection is performed on a block, table region structures for that block, and another (e.g., the next block to be garbage collected) are read to avoid loading L2P table regions that do not point to the block. If any of the read portions of the L2P table region fail to point to either the block or the other block, these L2P table portions are removed from the loaded table region data structures.
-
公开(公告)号:US20210181940A1
公开(公告)日:2021-06-17
申请号:US16077175
申请日:2017-12-13
Applicant: Micron Technology, Inc.
Inventor: Zhao Cui , Eric Yuen , Guan Zhong Wang , Xinghui Duan , Hua Chen Li
Abstract: Devices and techniques for variable width superblock addressing are described herein. A superblock width, specified in number of planes, is obtained. A superblock entry is created in a translation table of a NAND device. Here, the superblock entry may include a set of blocks, from the NAND device, that have the same block indexes across multiple die of the NAND device. The number of unique block indexes are equal to the number of planes and in different planes. A request, received from a requesting entity, is performed using the superblock entry. Performing the request includes providing a single instruction to multiple die of the NAND device and multiple data segments. Here, a data segment corresponds to a block in the set of blocks specified by a tuple of block index and die. A result of the request is then returned to the requesting entity.
-
公开(公告)号:US20220011936A1
公开(公告)日:2022-01-13
申请号:US17486420
申请日:2021-09-27
Applicant: Micron Technology, Inc.
Inventor: Zhao Cui , Eric Kwok Fung Yuen , Guanzhong Wang , Xinghui Duan , Hua Chen Li
Abstract: Devices and techniques for variable width superblock addressing are described herein. A superblock width, specified in number of planes, is obtained. A superblock entry is created in a translation table of a NAND device. Here, the superblock entry may include a set of blocks, from the NAND device, that have the same block indexes across multiple die of the NAND device. The number of unique block indexes are equal to the number of planes and in different planes. A request, received from a requesting entityp, is performed using the superblock entry. Performing the request includes providing a single instruction to multiple die of the NAND device and multiple data segments. Here, a data segment corresponds to a block in the set of blocks specified by a tuple of block index and die. A result of the request is then returned to the requesting entity.
-
公开(公告)号:US20200142821A1
公开(公告)日:2020-05-07
申请号:US16075543
申请日:2017-12-13
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Zhao Cui , Eric Kwok Fung Yuen , Guan Zhong Wang , Xinghui Duan , Giuseppe D'Eliseo , Giuseppe Ferrari
IPC: G06F12/02 , G06F12/0873
Abstract: Devices and techniques for synchronizing NAND logical-to-physical table region tracking are described herein. Table region data structures for physical blocks are maintained. These structures include logical-to-physical (L2P) mapping table portions that point to the respective physical blocks. When garbage collection is performed on a block, table region structures for that block, and another (e.g., the next block to be garbage collected) are read to avoid loading L2P table regions that do not point to the block. If any of the read portions of the L2P table region fail to point to either the block or the other block, these L2P table portions are removed from the loaded table region data structures.
-
-
-
-
-
-