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    METHOD OF FABRICATING AN INTEGRATED CIRCUIT DEVICE
    1.
    发明申请
    METHOD OF FABRICATING AN INTEGRATED CIRCUIT DEVICE 有权
    制造集成电路装置的方法

    公开(公告)号：US20130023094A1

    公开(公告)日：2013-01-24

    申请号：US13189108

    申请日：2011-07-22

    申请人： Ming-Hsi YEH ,  Hsien-Hsin LIN ,  Ying-Hsueh CHANG CHIEN ,  Yi-Fang PAI ,  Chi-Ming YANG ,  Chin-Hsiang LIN

    发明人： Ming-Hsi YEH ,  Hsien-Hsin LIN ,  Ying-Hsueh CHANG CHIEN ,  Yi-Fang PAI ,  Chi-Ming YANG ,  Chin-Hsiang LIN

    IPC分类号： H01L21/8238 ,  H01L21/8234 ,  H01L21/336

    CPC分类号： H01L29/665 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823864 ,  Y10S438/976

    摘要： A method for fabricating an integrated device is disclosed. A protective layer is formed over a gate structure when forming epitaxial (epi) features adjacent to another gate structure uncovered by the protective layer. The protective layer is thereafter removed after forming the epitaxial (epi) features. The disclosed method provides an improved method for removing the protective layer without substantial defects resulting. In an embodiment, the improved formation method is achieved by providing a protector over an oxide-base material, and then removing the protective layer using a chemical comprising hydrofluoric acid.

    摘要翻译： 公开了一种用于制造集成器件的方法。 当形成与由保护层未覆盖的另一个栅极结构相邻的外延（epi）特征时，在栅极结构上形成保护层。 此后，在形成外延（epi）特征之后，去除保护层。 所公开的方法提供了用于去除保护层而没有实质缺陷的改进方法。 在一个实施方案中，改进的形成方法通过在氧化物基材料上提供保护剂，然后使用包含氢氟酸的化学品除去保护层来实现。

    EPITAXIAL FORMATION OF SOURCE AND DRAIN REGIONS
    2.
    发明申请
    EPITAXIAL FORMATION OF SOURCE AND DRAIN REGIONS 有权
    源区和排水区的外来形成

    公开(公告)号：US20130328126A1

    公开(公告)日：2013-12-12

    申请号：US13493626

    申请日：2012-06-11

    申请人： Chun Hsiung TSAI ,  Yi-Fang PAI

    发明人： Chun Hsiung TSAI ,  Yi-Fang PAI

    IPC分类号： H01L27/088 ,  H01L21/336

    CPC分类号： H01L27/088 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/823425 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/167 ,  H01L29/41783 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848

    摘要： Mechanisms for forming source/drain (S/D) regions of field effect transistors (FETs) are provided. The mechanisms eliminate dislocations near gate corners and gate corner defects (GCDs), and maintain transistor performance. The mechanisms described involve using a post-deposition etch to remove residual dislocations near gate corners after a cyclic deposition and etching (CDE) process is used to fill a portion of the recess regions with an epitaxially grown silicon-containing material. The mechanisms described also minimize the growth of dislocations near gate corners during the CDE process. The remaining recess regions may be filled by another silicon-containing layer deposited by an epitaxial process without forming dislocations near gate corners. The embodiments described enable gate corners to be free of dislocation defects, preserve the device performance from degradation, and widen the process window of forming S/D regions without gate corner defects and chamber matching issues.

    摘要翻译： 提供了用于形成场效应晶体管（FET）的源极/漏极（S / D）区域的机构。 这些机制消除了栅极拐角和栅极角缺陷（GCD）附近的位错，并保持了晶体管的性能。 所描述的机理涉及在循环沉积和蚀刻（CDE）工艺用外延生长的含硅材料填充一部分凹陷区域之后使用后沉积蚀刻去除栅极角附近的残留位错。 所描述的机制还使CDE过程中门角附近的位错生长最小化。 剩余的凹陷区域可以由通过外延工艺沉积的另一个含硅层填充，而不会在栅极拐角附近形成位错。 所描述的实施方式使得栅极角不受位错缺陷，保护器件性能不受降解，并且扩大了形成S / D区域的过程窗口，而没有门角缺陷和腔室匹配问题。