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公开(公告)号：US20240072043A1
公开(公告)日：2024-02-29
申请号：US18298030
申请日：2023-04-10
发明人： Hidenori FUJII , Koji TANAKA , Sho TANAKA , Shinya SONEDA
IPC分类号： H01L27/06 , H01L23/34 , H01L29/66 , H01L29/739
CPC分类号： H01L27/0664 , H01L23/34 , H01L29/66348 , H01L29/7397
摘要： To provide a semiconductor device that includes: a semiconductor substrate provided with a semiconductor portion that is at least one of a gate insulating film, a pn junction, or a drift layer of a terminal region; an insulating film provided on the semiconductor portion; a metal electrode having an opening that overlaps the semiconductor portion in plan view and is provided on a side opposite to the semiconductor portion with respect to the insulating film in cross-sectional view; and a plated electrode provided at at least a portion of an inside of the opening using the metal electrode as a material to be plated.
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公开(公告)号：US20220123132A1
公开(公告)日：2022-04-21
申请号：US17387799
申请日：2021-07-28
发明人： Koichi NISHI , Sho TANAKA , Shinya SONEDA , Kazuya KONISHI
IPC分类号： H01L29/739 , H01L27/06 , H01L29/10 , H01L29/40 , H01L29/861 , H01L21/265 , H01L21/266 , H01L29/66
摘要： In a mesa region sandwiched between adjacent active trenches among mesa regions that are regions each sandwiched between adjacent trenches, a third semiconductor layer has regions discretely arranged in a first direction so as to be in contact with one active trench of the adjacent active trenches and not in contact with the other active trench, and regions discretely arranged in the first direction so as to be in contact with the other active trench and not in contact with the one active trench. In the mesa region sandwiched between the adjacent active trenches, a fourth semiconductor layer is disposed between the third semiconductor layer on the side in contact with the one active trench and the third semiconductor layer on the side in contact with the other active trench in plan view and between the respective regions of the third semiconductor layer discrete in the first direction.
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公开(公告)号：US20210305174A1
公开(公告)日：2021-09-30
申请号：US17155016
申请日：2021-01-21
发明人： Akito NISHII , Tatsuo HARADA , Katsumi URYU , Noritsugu NOMURA , Sho TANAKA
IPC分类号： H01L23/00
摘要： According to one aspect, a semiconductor device includes: a buffer layer disposed on a front surface of a second semiconductor layer, and having at least one opening in plan view; and an electrode disposed over the second semiconductor layer and the buffer layer, and being in contact with the second semiconductor layer through the at least one opening, wherein the buffer layer has a higher Vickers hardness than the electrode, and a width w of each of the at least one opening satisfies w
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公开(公告)号：US20190333999A1
公开(公告)日：2019-10-31
申请号：US16233830
申请日：2018-12-27
发明人： Sho TANAKA
IPC分类号： H01L29/40 , H01L29/739
摘要： A semiconductor apparatus includes a semiconductor substrate. Semiconductor substrate includes an active region and a peripheral region surrounding active region. Semiconductor substrate has a front surface and a back surface. A semiconductor device includes an n− drift region and a p+ collector layer. Peripheral region includes n− drift region and a p+ back surface peripheral layer. P3+ back surface peripheral layer is provided on the back surface side of n− drift region. A first hole concentration in p+ back surface peripheral layer is higher than a second hole concentration in p+ collector layer. The short-circuit capability of semiconductor apparatus is improved.
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公开(公告)号：US20240047454A1
公开(公告)日：2024-02-08
申请号：US18295812
申请日：2023-04-04
发明人： Hidenori FUJII , Sho TANAKA , Shinya SONEDA , Kazuya KONISHI
IPC分类号： H01L27/06 , H01L29/32 , H01L29/861 , H01L29/739 , H01L21/268 , H01L29/66
CPC分类号： H01L27/0664 , H01L29/32 , H01L29/8613 , H01L29/7397 , H01L21/268 , H01L29/66348
摘要： A semiconductor device includes a semiconductor region provided with a semiconductor layer on a main surface side, and a first defect provided in the semiconductor layer and extending from the main surface side in a direction including a component in a thickness direction. The semiconductor region includes at least one of a diode region in which a cathode layer is provided as the semiconductor layer or an IGBT region in which a collector layer is provided as the semiconductor layer.
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公开(公告)号：US20220246603A1
公开(公告)日：2022-08-04
申请号：US17453530
申请日：2021-11-04
发明人： Sho TANAKA , Tomohide TERASHIMA
IPC分类号： H01L27/02 , H02H9/02 , H03K17/082
摘要： A semiconductor device includes a main IGBT, a sense, a resistor, a MOSFET and a diode, as main components. The sense IGBT and the main IGBT are connected in parallel with each other. The drain of MOSFET is connected to the gate of the sense IGBT, the source thereof is connected to the gate of the main IGBT, and the gate thereof is connected to the emitter of the sense IGBT and the cathode of diode. One end of the resistor is connected to the gate of the main IGBT and the source of the MOSFET, and the other end of the resistor is connected to the emitter of the main IGBT and the anode of the diode.
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公开(公告)号：US20200083879A1
公开(公告)日：2020-03-12
申请号：US16466341
申请日：2016-12-12
发明人： Sho TANAKA , Shigeru KUSUNOKI
IPC分类号： H03K17/081 , H01L29/06 , H01L29/739
摘要： A semiconductor device includes a plurality of first transistor cells and a plurality of second transistor cells that are electrically connected in parallel between a collector electrode and an emitter electrode. A gate voltage on each of the plurality of first transistor cells is controlled by a first gate interconnection. A gate voltage on each of the plurality of second transistor cells is controlled by a second gate interconnection. A drive circuit is configured to: apply an ON-voltage of the semiconductor device to each of the first and second gate interconnections when the semiconductor device is turned on; and after a lapse of a predetermined time period since start of application of the ON-voltage, apply an OFF-voltage of the semiconductor device to the second gate interconnection and apply an ON-voltage to the first gate interconnection.
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