公开(公告)号：US20170053743A1

公开(公告)日：2017-02-23

申请号：US15345571

申请日：2016-11-08

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Jun IKEDA ,  Kota ZENZAI

IPC: H01G4/30 ,  H01G4/005 ,  H01G4/12 ,  H01G4/228

CPC classification number: H01G4/30 ,  H01G4/005 ,  H01G4/012 ,  H01G4/12 ,  H01G4/228 ,  H01G4/232 ,  H01G4/2325 ,  H01G4/248

Abstract: A multilayer ceramic electronic component includes a ceramic element body including internal electrodes and external electrodes electrically connected to respective internal electrodes. Each of the external electrodes includes a sintered metal layer including glass and metal and a conductive resin layer including resin and metal particles. In a cross section of the multilayer ceramic capacitor, at an interface between the sintered metal layer and the conductive resin layer, recesses having a shape in which a dimension of an inner portion is larger than a dimension of an inlet are present, and L1/L2 is about 0.2 or more and about 1.5 or less, where L1 is a length along the interface at which the glass of the sintered metal layer is exposed at the interface, and L2 is a length along the interface at which the metal of the sintered metal layer is exposed at the interface.

Abstract translation: 多层陶瓷电子部件包括陶瓷元件体，其包括内部电极和与各自的内部电极电连接的外部电极。 每个外部电极包括包括玻璃和金属的烧结金属层和包括树脂和金属颗粒的导电树脂层。 在多层陶瓷电容器的截面中，在烧结金属层与导电性树脂层之间的界面处存在具有内部尺寸大于入口尺寸的形状的凹部，L1 / L2为约0.2以上且约1.5以下，其中，L1是沿着烧结金属层的玻璃在界面露出的界面的长度，L2是沿烧结金属的金属的界面的长度 金属层在界面处露出。

公开(公告)号：US20160172108A1

公开(公告)日：2016-06-16

申请号：US14677059

申请日：2015-04-02

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Jun IKEDA ,  Kota ZENZAI

IPC: H01G4/232 ,  H01G4/248 ,  H01G4/12 ,  H01G4/30 ,  H01G4/012

CPC classification number: H01G4/30 ,  H01G4/005 ,  H01G4/012 ,  H01G4/12 ,  H01G4/228 ,  H01G4/232 ,  H01G4/2325 ,  H01G4/248

Abstract: A multilayer ceramic electronic component includes a ceramic element body including internal electrodes and external electrodes electrically connected to respective internal electrodes. Each of the external electrodes includes a sintered metal layer including glass and metal and a conductive resin layer including resin and metal particles. In a cross section of the multilayer ceramic capacitor, at an interface between the sintered metal layer and the conductive resin layer, recesses having a shape in which a dimension of an inner portion is larger than a dimension of an inlet are present, and L1/L2 is about 0.2 or more and about 1.5 or less, where L1 is a length along the interface at which the glass of the sintered metal layer is exposed at the interface, and L2 is a length along the interface at which the metal of the sintered metal layer is exposed at the interface.

Abstract translation: 多层陶瓷电子部件包括陶瓷元件体，其包括内部电极和与各自的内部电极电连接的外部电极。 每个外部电极包括包括玻璃和金属的烧结金属层和包括树脂和金属颗粒的导电树脂层。 在多层陶瓷电容器的截面中，在烧结金属层与导电性树脂层之间的界面处存在具有内部尺寸大于入口尺寸的形状的凹部，L1 / L2为约0.2以上且约1.5以下，其中，L1是沿着烧结金属层的玻璃在界面露出的界面的长度，L2是沿烧结金属的金属的界面的长度 金属层在界面处露出。

公开(公告)号：US20150187498A1

公开(公告)日：2015-07-02

申请号：US14541212

申请日：2014-11-14

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Kazuhisa UCHIDA ,  Yoshito SAITO ,  Jun IKEDA

IPC: H01G4/12 ,  H01G4/248 ,  H01G4/30 ,  H01G4/012

CPC classification number: H01G4/1227 ,  H01G4/012 ,  H01G4/1218 ,  H01G4/30

Abstract: In a multilayer ceramic capacitor, an inner ceramic layer includes a perovskite-type compound containing Ba and Ti. A region within an electrically effective portion of the inner ceramic layers sandwiched between inner electrodes, which is near an area where inner and outer electrodes connect to each other, is subjected to a mapping analysis using EDS. ((L2−L3)/L1)×100≧50 is satisfied, L1 denotes a total length of ceramic grain boundaries detected from a TEM transmission image, L2 denotes a total length of grain boundaries, detected from a mapping image and the TEM transmission image, where the rare earth element is present, and L3 denotes a total length of portions, detected from a mapping image and the TEM transmission image, in which the grain boundaries where the rare earth element is present and grain boundaries where at least one of Mn, Mg, and Si is present are overlapped.

Abstract translation: 在多层陶瓷电容器中，内部陶瓷层包括含有Ba和Ti的钙钛矿型化合物。 夹在内部电极之间的内部陶瓷层的电学有效部分内的区域，其内部和外部电极彼此连接的区域附近，使用EDS进行映射分析。 （（L2-L3）/ L1）×100≥50，L1表示从TEM透射图像检测出的陶瓷晶界的总长度，L2表示从映射图像和TEM透射检测出的晶界的总长度 图像，其中存在稀土元素，L3表示从映射图像和TEM透射图像检测的部分的总长度，其中存在稀土元素的晶界和晶界，其中至少一个 Mn，Mg和Si存在重叠。

公开(公告)号：US20150187497A1

公开(公告)日：2015-07-02

申请号：US14582260

申请日：2014-12-24

Applicant: MURATA MANUFACTURING CO., LTD.

Inventor： Yoshito SAITO ,  Jun IKEDA ,  Kazuhisa UCHIDA

IPC: H01G4/12 ,  H01J37/26 ,  H01G4/005 ,  G01N23/225 ,  H01G4/30 ,  H01G4/248

CPC classification number: H01G4/1218 ,  G01N23/2252 ,  H01G4/0085 ,  H01G4/1227 ,  H01G4/2325 ,  H01G4/30

Abstract: In a monolithic ceramic capacitor, ceramic layers defining inner layers are mainly composed of a perovskite compound containing Ba and Ti. A portion of an electrically effective section in the ceramic layers near a connecting portion between the inner electrodes and an outer electrode undergoes mapping analysis by an energy-dispersive method. In regions of the resulting mapping image, the regions extending from the interfaces between the inner electrodes and a corresponding one of the ceramic layers to positions about ⅓ of the thickness of the ceramic layer in the stacking direction, ((L2−L3)/L1)×100≧50 is satisfied, where L1 represents the total length of grain boundaries, L2 represents the total length of grain boundaries where a rare-earth element is present, and L3 represents the total length of portions where the grain boundaries where the rare-earth element is present are overlapped with grain boundaries with a specific element present.

Abstract translation: 在单片陶瓷电容器中，限定内层的陶瓷层主要由含有Ba和Ti的钙钛矿化合物组成。 陶瓷层中靠近内部电极和外部电极之间的连接部分的电气部分的一部分通过能量分散方法进行映射分析。 在所得到的映射图像的区域中，从内部电极和对应的一个陶瓷层之间的界面延伸到层叠方向上约为陶瓷层厚度的1/3的区域（（L2-L3）/ L1 ）×100≥50，其中L1表示晶界的总长度，L2表示存在稀土元素的晶界的总长度，L3表示稀土元素的晶界的部分的总长度 存在的地层元素与存在特定元素的晶界重叠。