公开(公告)号：US20240063252A1

公开(公告)日：2024-02-22

申请号：US18497049

申请日：2023-10-30

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yuta IMAMURA ,  Masatomi HARADA ,  Takeshi KAGAWA ,  Korekiyo ITO

IPC: H01L23/31 ,  H01L23/12

CPC classification number: H01L28/60 ,  H01L23/12 ,  H01L23/31

Abstract: A semiconductor device that includes: a substrate having a first main surface and a second main surface opposite to each other in a thickness direction; a circuit layer on the first main surface of the substrate; and a first resin body between an end portion of the substrate and the first outer electrode, and between the end portion of the substrate and the second outer electrode in a plan view in the thickness direction. In the thickness direction, a leading end of the first resin body is positioned higher than top ends of the first and second outer electrodes. In a sectional view, a first side surface of the first resin body approaches a second side surface of the first resin body on a side close to the end portion of the substrate, and the second side surface rises steeply against a first main surface of the substrate.

公开(公告)号：US20240062958A1

公开(公告)日：2024-02-22

申请号：US18497066

申请日：2023-10-30

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Masatomi HARADA ,  Korekiyo ITO ,  Takeshi KAGAWA ,  Yuta IMAMURA

IPC: H01G4/005 ,  H01G4/33 ,  H01G4/224

CPC classification number: H01G4/005 ,  H01G4/33 ,  H01G4/224

Abstract: A capacitor that includes: a substrate; a first electrode layer on the substrate, the first electrode layer including a first principal surface facing the substrate, and a second principal surface opposite the first principal surface; a dielectric film on the first electrode layer and covering an end portion of the first electrode layer; a second electrode layer on the dielectric film, the second electrode layer including a third principal surface facing the dielectric film, a fourth principal surface opposite the third principal surface, and a side surface joining the third principal surface and the fourth principal surface, wherein at least part of the side surface of the second electrode layer has a tapered shape which is inclined inward from the third principal surface to the fourth principal surface.

公开(公告)号：US20240071687A1

公开(公告)日：2024-02-29

申请号：US18502512

申请日：2023-11-06

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Korekiyo ITO ,  Masatomi HARADA ,  Yuta IMAMURA

IPC: H01G4/224 ,  H01G4/005 ,  H01G4/30 ,  H05K1/18

CPC classification number: H01G4/224 ,  H01G4/005 ,  H01G4/30 ,  H05K1/181 ,  H05K2201/10015

Abstract: A semiconductor device that includes: a substrate having a first main surface and a second main surface opposite to each other in a thickness direction; a circuit layer on the first main surface of the substrate, the circuit layer having a first electrode layer, a second electrode layer, a dielectric layer between the first electrode layer and the second electrode layer, a first outer electrode and a second outer electrode each extending to a surface of the circuit layer opposite to the substrate; and a first resin body at each of four corners of the substrate in a plan view in the thickness direction, and wherein, in the thickness direction, a top end of the first resin body on the side opposite to the substrate is positioned higher than top ends of the first outer electrode and the second outer electrode on the side opposite to the substrate.