公开(公告)号：US4091407A

公开(公告)日：1978-05-23

申请号：US737849

申请日：1976-11-01

申请人： Robert Powell Williams ,  Murray Arthur Polinsky

发明人： Robert Powell Williams ,  Murray Arthur Polinsky

IPC分类号： H01L21/314 ,  H01L21/318 ,  H01L23/29 ,  H01L23/31 ,  H01L23/485 ,  H01L23/532

CPC分类号： H01L23/53252 ,  H01L21/3145 ,  H01L21/3185 ,  H01L23/291 ,  H01L23/3171 ,  H01L23/485 ,  H01L2924/0002

摘要： A semiconductor device having an improved passivating structure comprises a first primary passivating layer free of any layer of silicon nitride (Si.sub.3 N.sub.4), disposed on a surface of a semiconductor body, a metallic conductor disposed on the first passivating layer, and a secondary passivating overcoat disposed over the metallic conductor, wherein the secondary passivating overcoat includes both a glass layer on the conductor and a low-temperature-deposited (typically 300.degree. C) nitride layer on the glass layer. The device is highly resistant to degradation in the presence of water vapor and corrosive atmospheres.

摘要翻译： 具有改善的钝化结构的半导体器件包括设置在半导体主体的表面上的任何无氮化硅层（Si 3 N 4）的第一初级钝化层，设置在第一钝化层上的金属导体和设置在第一钝化层上的二次钝化外涂层 在金属导体上，其中二次钝化外涂层包括导体上的玻璃层和玻璃层上的低温沉积（通常为300℃）的氮化物层。 该装置在水蒸气和腐蚀性气氛的存在下具有高度的抗降解性。

公开(公告)号：US3961358A

公开(公告)日：1976-06-01

申请号：US334431

申请日：1973-02-21

申请人： Murray Arthur Polinsky

发明人： Murray Arthur Polinsky

IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L29/00 ,  H01L29/41 ,  H01L29/40

CPC分类号： H01L23/522 ,  H01L29/00 ,  H01L2924/0002

摘要： Leakage currents can occur in monolithic semi-conductor integrated circuits through field induced inversion layer channels where the field arises from a layer of distributed charge on the surface of the passivating insulator. These channels can occur at locations where adjacent conductors are at substantially different potentials during circuit operation. At those locations where such channels, if present, could couple a region in the device to another region which may be at some different potential, a conductor layer is disposed on the insulating layer. This conductor layer is adapted to be biased during operation of the device in such a way that an inversion layer channel is not induced thereunder, so that a continuous channel between the two regions cannot be established. Other locations where channels are not likely to occur are left free of conductive material in order to save space.

摘要翻译： 泄漏电流可以通过场致感反演层通道在单片半导体集成电路中发生，其中场源自钝化绝缘体表面上的分布电荷层。 这些通道可以发生在电路操作期间相邻导体处于基本不同电位的位置处。 在这些通道（如果存在的地方）可以将器件中的区域耦合到可能处于不同电位的另一区域的那些位置处，导体层设置在绝缘层上。 该导体层适于在器件的操作期间被偏置，使得不会在其下引入反向层通道，从而不能建立两个区域之间的连续通道。 通道不可能发生的其他位置不含导电材料，以节省空间。

公开(公告)号：US3959025A

公开(公告)日：1976-05-25

申请号：US465892

申请日：1974-05-01

申请人： Murray Arthur Polinsky

发明人： Murray Arthur Polinsky

IPC分类号： H01L21/00 ,  H01L21/18 ,  H01L21/265 ,  H01L29/00

CPC分类号： H01L21/265 ,  H01L21/00 ,  H01L21/18 ,  H01L29/00 ,  Y10S148/106 ,  Y10S148/114 ,  Y10S148/145

摘要： An improved insulated gate field effect transistor is achieved by using a material such as silicon nitride as an ion implantation and oxidation mask overlying a channel region, forming source and drain regions or extensions thereof by implanting ions of a conductivity modifier into a semiconductor substrate, and subjecting the implanted ions to a drive-in diffusion whereby the conductivity modifier ions are redistributed. The ion implantation allows greater control over the amount of conductivity modifier implanted in the lightly doped source and drain regions, the more uniform distribution of conductivity modifier increases the source-drain breakdown voltage, while the use of the silicon nitride mask provides simultaneously for general alignment of the channel region with the effective gate length.

摘要翻译： 通过使用诸如氮化硅的材料作为离子注入和覆盖沟道区域的氧化掩模，通过将电导率调节剂的离子注入到半导体衬底中来形成源极和漏极区域或其延伸来实现改进的绝缘栅场效应晶体管，以及 对植入的离子进行驱动扩散，由此电导率调节剂离子被重新分布。 离子注入允许更好地控制植入轻掺杂源极和漏极区域的电导率修饰剂的量，更均匀的电导率调节剂分布增加了源极 - 漏极击穿电压，同时使用氮化硅掩模同时提供一般的对准 具有有效栅极长度的沟道区域。

公开(公告)号：US4096512A

公开(公告)日：1978-06-20

申请号：US775896

申请日：1977-03-09

申请人： Murray Arthur Polinsky

发明人： Murray Arthur Polinsky

IPC分类号： H01L27/144 ,  H01L31/0216 ,  H01L31/103 ,  H01L27/14

CPC分类号： H01L31/02164 ,  H01L27/1443 ,  H01L31/103

摘要： A highly sensitive light detector is described which employs two interdigitated PN junction light detectors, one of which is covered by an opaque material. The one covered by opaque material is used as a standard for eliminating dark current efffects.

摘要翻译： 描述了一种高灵敏度的光检测器，其采用两个叉指式PN结光检测器，其中一个被不透明材料覆盖。 被不透明材料覆盖的材料用作消除暗电流效应的标准。

公开(公告)号：US3934059A

公开(公告)日：1976-01-20

申请号：US439581

申请日：1974-02-04

申请人： Murray Arthur Polinsky

发明人： Murray Arthur Polinsky

IPC分类号： C23C14/06 ,  C23C14/24 ,  C23C14/54 ,  H01L21/285 ,  H01L23/485 ,  C23C13/02

CPC分类号： C23C14/541 ,  H01L23/485 ,  H01L2924/0002

摘要： A method of vapor depositing a material onto a substrate results in improved substrate step coverage by the material while keeping the substrate clean by minimizing the evaporation of contaminants onto the surface of the substrate. The method comprises depositing a first layer of material onto the substrate, while the substrate is at a first temperature, heating the substrate to a higher temperature, and then depositing a second layer while maintaining the substrate at the higher temperature.

摘要翻译： 将材料气相沉积到衬底上的方法导致材料改进的衬底步骤覆盖，同时通过最小化污染物在衬底的表面上的蒸发来保持衬底的清洁。 该方法包括将第一层材料沉积到衬底上，同时衬底处于第一温度，将衬底加热至较高温度，然后沉积第二层同时将衬底保持在较高温度。