摘要:
A pre-driver for an amplifier comprising a load network in which the following elements are connected in the following order: a resistor-an inductor-a capacitor. Also described are a power amplifier comprising such a pre-driver, a method of fabricating a pre-driver for an amplifier, and a method of performing power amplification.
摘要:
A pre-driver for an amplifier comprising a load network in which the following elements are connected in the following order: a resistor-an inductor-a capacitor. Also described are a power amplifier comprising such a pre-driver, a method of fabricating a pre-driver for an amplifier, and a method of performing power amplification.
摘要:
Various embodiments relate to a reconfigurable integrated digital Chireix out-phasing power amplifier for use in high power base stations is described and a related method of said design. The power amplifier may include a power transistor circuitry having plurality of power transistors and shunt-series circuitry (L1C1, L2C2), a broadband combiner having Chireix compensation elements, and an impedance matching filter. The power transistor circuitry, the broadband combiner, and the impedance matching filter are integrated in a unified package. In one embodiment, the power amplifier is implemented in a real switch-mode to facilitate integration of the Chireix compensation elements so as to make the Chireix power amplifier tunable. A method of driving Chireix power amplifier structure is also described.
摘要:
A transmitter (200) comprises a first Chireix compensation circuit (230, 232, 238, 240) and a second Chireix compensation circuit (234, 236, 238, 240), wherein each Chireix compensation circuit has two inputs and two outputs. Two constant envelope input signals (22, 224) to be amplified are guided by a switch (226) to either the first or second Chireix amplifier unit. The selection as such depends on the phase (212) of the input signals to be amplified. The outputs of the two Chireix compensation circuits are cross-coupled to an inductive load (242). A Chireix inductor (238) and a Chireix capacitor (240), each having one terminal grounded, are also connected to the inductive load (242). By switching the signals to be amplified in response to their phase, optimum matching is ensured.
摘要:
Various embodiments relate to a reconfigurable integrated digital Chireix out-phasing power amplifier for use in high power base stations is described and a related method of said design. The power amplifier may include a power transistor circuitry having plurality of power transistors and shunt-series circuitry (L1C1, L2C2), a broadband combiner having Chireix compensation elements, and an impedance matching filter. The power transistor circuitry, the broadband combiner, and the impedance matching filter are integrated in a unified package. In one embodiment, the power amplifier is implemented in a real switch-mode to facilitate integration of the Chireix compensation elements so as to make the Chireix power amplifier tunable. A method of driving Chireix power amplifier structure is also described.
摘要:
A transmitter (200) comprises a first Chireix compensation circuit (230, 232, 238, 240) and a second Chireix compensation circuit (234, 236, 238, 240), wherein each Chireix compensation circuit has two inputs and two outputs. Two constant envelope input signals (22, 224) to be amplified are guided by a switch (226) to either the first or second Chireix amplifier unit. The selection as such depends on the phase (212) of the input signals to be amplified. The outputs of the two Chireix compensation circuits are cross-coupled to an inductive load (242). A Chireix inductor (238) and a Chireix capacitor (240), each having one terminal grounded, are also connected to the inductive load (242). By switching the signals to be amplified in response to their phase, optimum matching is ensured.
摘要:
Various embodiments relate to a reconfigurable integrated digital Chireix out-phasing power amplifier for use in high power base stations is described and a related method of said design. The power amplifier may include a power transistor circuitry having plurality of power transistors and shunt-series circuitry (L1C1, L2C2), a broadband combiner having Chireix compensation elements, and an impedance matching filter. In one embodiment, the power amplifier is implemented in a real switch-mode to facilitate integration of the Chireix compensation elements so as to make the Chireix power amplifier tunable. A method of driving Chireix power amplifier structure is also described. In some embodiments, a variable supply voltage may power the transistor circuitry based on the desired output power of the Chireix power amplifier. In some embodiments, the variable supply voltage may depend upon an out-phasing angle between the two drivers in the transistor circuitry.
摘要:
Various embodiments relate to a reconfigurable integrated digital Chireix out-phasing power amplifier for use in high power base stations is described and a related method of said design. The power amplifier may include a power transistor circuitry having plurality of power transistors and shunt-series circuitry (L1C1, L2C2), a broadband combiner having Chireix compensation elements, and an impedance matching filter. In one embodiment, the power amplifier is implemented in a real switch-mode to facilitate integration of the Chireix compensation elements so as to make the Chireix power amplifier tunable. A method of driving Chireix power amplifier structure is also described. In some embodiments, a variable supply voltage may power the transistor circuitry based on the desired output power of the Chireix power amplifier. In some embodiments, the variable supply voltage may depend upon an out-phasing angle between the two drivers in the transistor circuitry.
摘要:
Method for setup of parameter values in a RF power amplifier circuit arrangement (200), wherein the amplifier circuit arrangement (200) comprises a first (210) and a second (220) amplification branch and is operated in an out-phasing configuration for amplification of RF input signals with modulated amplitude and modulated phase and respective circuit arrangements are disclosed. According to a first aspect a re-optimization of the dead-time or conversely the duty-cycle, respectively, the phase of the output signal after the combiner can be kept linear with respect to the out-phasing angle. Further, according to a second aspect, additionally to introduction of an optimally chosen dead-time, a non-coherent combiner (Lx, Lx*) can reduce crowbar current and switching losses due the output capacitance (Cds). Furthermore, according to a third aspect the reactive compensation can, additionally or alternatively, be controlled by operating both amplification branches at different duty-cycles.
摘要:
Method for setup of parameter values in a RF power amplifier circuit arrangement (200), wherein the amplifier circuit arrangement (200) comprises a first (210) and a second (220) amplification branch and is operated in an out-phasing configuration for amplification of RF input signals with modulated amplitude and modulated phase and respective circuit arrangements are disclosed. According to a first aspect a re-optimization of the dead-time or conversely the duty-cycle, respectively, the phase of the output signal after the combiner can be kept linear with respect to the out-phasing angle. Further, according to a second aspect, additionally to introduction of an optimally chosen dead-time, a non-coherent combiner (Lx, Lx*) can reduce crowbar current and switching losses due the output capacitance (Cds). Furthermore, according to a third aspect the reactive compensation can, additionally or alternatively, be controlled by operating both amplification branches at different duty-cycles.