摘要:
Various embodiments relate to a reconfigurable integrated digital Chireix out-phasing power amplifier for use in high power base stations is described and a related method of said design. The power amplifier may include a power transistor circuitry having plurality of power transistors and shunt-series circuitry (L1C1, L2C2), a broadband combiner having Chireix compensation elements, and an impedance matching filter. In one embodiment, the power amplifier is implemented in a real switch-mode to facilitate integration of the Chireix compensation elements so as to make the Chireix power amplifier tunable. A method of driving Chireix power amplifier structure is also described. In some embodiments, a variable supply voltage may power the transistor circuitry based on the desired output power of the Chireix power amplifier. In some embodiments, the variable supply voltage may depend upon an out-phasing angle between the two drivers in the transistor circuitry.
摘要:
Various embodiments relate to a reconfigurable integrated digital Chireix out-phasing power amplifier for use in high power base stations is described and a related method of said design. The power amplifier may include a power transistor circuitry having plurality of power transistors and shunt-series circuitry (L1C1, L2C2), a broadband combiner having Chireix compensation elements, and an impedance matching filter. In one embodiment, the power amplifier is implemented in a real switch-mode to facilitate integration of the Chireix compensation elements so as to make the Chireix power amplifier tunable. A method of driving Chireix power amplifier structure is also described. In some embodiments, a variable supply voltage may power the transistor circuitry based on the desired output power of the Chireix power amplifier. In some embodiments, the variable supply voltage may depend upon an out-phasing angle between the two drivers in the transistor circuitry.
摘要:
A pre-driver for an amplifier comprising a load network in which the following elements are connected in the following order: a resistor-an inductor-a capacitor. Also described are a power amplifier comprising such a pre-driver, a method of fabricating a pre-driver for an amplifier, and a method of performing power amplification.
摘要:
A pre-driver for an amplifier comprising a load network in which the following elements are connected in the following order: a resistor-an inductor-a capacitor. Also described are a power amplifier comprising such a pre-driver, a method of fabricating a pre-driver for an amplifier, and a method of performing power amplification.
摘要:
Power reduction in transmitters is very important. One method to realize reduction is to make use of switching power amplifiers (PA) that have a better efficiency. Switching PA concepts are only possible in combination with suitable modulation methods like pulse width modulation (PWM) and out-phasing concepts. However, PWM and out-phasing concepts rely on accurate phase control and duty cycle of the signals. Digitally generation of signals of variable duty cycles and phase is proposed without sacrificing their accuracy. Accordingly, a out-phasing power amplifier arrangement is disclosed, where the generation of the out-phasing angle (θ) and duty cycles (d1 and d2) are controlled by a set of n-bit digital input words (D1, D2, D3, D4). The baseband phase information (φ(t)) is phase modulated back to radio frequency and used as the clock signal of digital circuitry for phase and duty cycle generation after being frequency multiplied by 2n-1. The resolution of the out-phasing angle and of the duty cycle is 2π/2n and 2π/2n-1 equivalently. The resolution of the phase information φ is dependent on the PM realization.
摘要:
A power amplifier, for example a class-E switching power amplifier, and corresponding method, comprising: a plurality of power transistors (16), for example twelve power transistors, providing a partitioned power transistor; and a voltage sensing module (22), comprising for example voltage dividers and inverters, digitally sensing the drain voltage (2) of the partitioned power transistor to control the number of power transistors of the plurality of power transistors (16) that are switched on or off thereby controlling the drain voltage (2) which is varying for example due to antenna mismatch. The power amplifier may further comprise a memory (24) coupled to the voltage sensing module (22) for storing a history of the drain voltage (2), e.g. a history of antenna mismatch.
摘要:
A power amplifier, for example a class-E switching power amplifier, and corresponding method, comprising: a plurality of power transistors (16), for example twelve power transistors, providing a partitioned power transistor; and a voltage sensing module (22), comprising for example voltage dividers and inverters, digitally sensing the drain voltage (2) of the partitioned power transistor to control the number of power transistors of the plurality of power transistors (16) that are switched on or off thereby controlling the drain voltage (2) which is varying for example due to antenna mismatch. The power amplifier may further comprise a memory (24) coupled to the voltage sensing module (22) for storing a history of the drain voltage (2), e.g. a history of antenna mismatch.
摘要:
Power reduction in transmitters is very important. One method to realize reduction is to make use of switching power amplifiers (PA) that have a better efficiency. Switching PA concepts are only possible in combination with suitable modulation methods like pulse width modulation (PWM) and out-phasing concepts. However, PWM and out-phasing concepts rely on accurate phase control and duty cycle of the signals. Digitally generation of signals of variable duty cycles and phase is proposed without sacrificing their accuracy. Accordingly, a out-phasing power amplifier arrangement is disclosed, where the generation of the out-phasing angle (θ) and duty cycles (d1 and d2) are controlled by a set of n-bit digital input words (D1, D2, D3, D4). The baseband phase information (φ(t)) is phase modulated back to radio frequency and used as the clock signal of digital circuitry for phase and duty cycle generation after being frequency multiplied by 2n−1. The resolution of the out-phasing angle and of the duty cycle is 2π/2n and 2π/2n−1 equivalently. The resolution of the phase information φ is dependent on the PM realization.
摘要:
A system and method for transmitting a baseband real signal with a non-constant envelope using a polar transmitter involves decomposing a baseband real signal into a non-constant envelope signal of the baseband real signal and a sign signal of the baseband real signal, where the sign signal restores zero crossing regions of the non-constant envelope signal, modulating a carrier signal with the sign signal of the baseband real signal to generate a modulated signal, converting the non-constant envelope signal of the baseband real signal into a voltage signal using a voltage controlled supply regulator, amplifying the modulated signal into an amplified signal based on the voltage signal, and transmitting the amplified signal to an external wireless device.
摘要:
An electronic circuit has an amplifier with an amplifying transistor (260) and a cascode transistor (262). A capacitive voltage divider (268) applies a fraction of an RF signal swing from the drain of the cascode transistor (262) to the gate of the cascode transistor (262), the fraction being determined by a ratio between capacitance values. In addition a bias voltage supply circuit (29, 290, 266) is provided. The bias voltage supply circuit is configured to define a relation between an average gate voltage of the cascode transistor (262) and an average drain supply voltage at the drain of the cascode transistor (262). This relation increases the average gate voltage with increasing average drain voltage, and the relation provides a non zero average gate voltage when extrapolated to zero average drain supply voltage.