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    Deinterleaver and dual-viterbi decoder architecture
    1.
    发明申请
    Deinterleaver and dual-viterbi decoder architecture 有权
    去交织器和双维特比解码器架构

    公开(公告)号：US20070067704A1

    公开(公告)日：2007-03-22

    申请号：US11490844

    申请日：2006-07-21

    申请人： Mustafa Altintas ,  Turgut Aytur ,  Ravishankar Mahadevappa ,  Feng Shi ,  Stephan Brink ,  Ran Yan

    发明人： Mustafa Altintas ,  Turgut Aytur ,  Ravishankar Mahadevappa ,  Feng Shi ,  Stephan Brink ,  Ran Yan

    IPC分类号： H03M13/03

    CPC分类号： H03M13/41 ,  H03M13/27 ,  H03M13/6561 ,  H03M13/6566 ,  H04L1/0054 ,  H04L1/0059 ,  H04L1/0068 ,  H04L1/0071 ,  H04L1/06

    摘要： Pairs of parallel Viterbi decoders use windowed block data for decoding data at rates above 320 Mbps. Memory banks of the deinterleavers feeding the decoders operate such that some are receiving data while others are sending data to the decoders. Parallel input streams to every pair of decoders overlap for several traceback lengths of the decoder causing data input to a first decoder at the end of an input stream to be the same as the data input to a second decoder of the same pair at the beginning of an input stream. Then, the first decoder is able to post-synchronize its path metric with the second decoder and the second decoder is able to pre-synchronize its path metric with the first. Either, the deinterleaver data length is an integer multiple of the traceback length or the data input to only the first block of the first interleaver is padded.

    摘要翻译： 一对并行维特比解码器使用窗口块数据，以高于320 Mbps的速率解码数据。 供给解码器的解交织器的存储器操作，使得一些接收数据，而其他数据传送到解码器。 对于每对解码器的并行输入流与解码器的几个回溯长度重叠，导致在输入流结束时输入到第一解码器的数据输入与输入到相同对的第二解码器的数据相同 一个输入流。 然后，第一解码器能够与第二解码器后同步其路径度量，并且第二解码器能够将其路径度量与第一解码器预先同步。 或者，解交织器数据长度是回溯长度的整数倍，或仅填充第一交织器的第一块的数据输入。

    Automatic gain control for frequency-hopped OFDM
    2.
    发明申请
    Automatic gain control for frequency-hopped OFDM 有权
    跳频OFDM自动增益控制

    公开(公告)号：US20070058739A1

    公开(公告)日：2007-03-15

    申请号：US11506754

    申请日：2006-08-18

    申请人： Turgut Aytur ,  Stephan Brink ,  Ravishankar Mahadevappa ,  Ran Yan

    发明人： Turgut Aytur ,  Stephan Brink ,  Ravishankar Mahadevappa ,  Ran Yan

    IPC分类号： H04K1/10 ,  H04L27/08

    CPC分类号： H04L27/2601 ,  H03G3/3068 ,  H04B1/71637 ,  H04L27/2647

    摘要： An automatic gain control method and system for use in signal processing of OFDM symbols at a receiver. Two stages of coarse and fine automatic gain control are implemented that adjust different gains in an analog RF processing stage of the receiver. Gain of a low noise amplifier and a mixer are adjusted during a first and coarse automatic gain control stage based on feedback from a digital baseband stage. During a subsequent fine gain control period, the gain of a programmable gain amplifier is adjusted separately for each frequency band used by the OFDM symbols based on a histogram bin that counts the number of output samples of an analog to digital converter whose magnitude falls within certain ranges. Coarse and fine gains are updated after each OFDM symbol.

    摘要翻译： 一种用于在接收机处对OFDM符号进行信号处理的自动增益控制方法和系统。 实现两级粗略和精细的自动增益控制，可在接收机的模拟RF处理阶段调整不同的增益。 基于来自数字基带级的反馈，在第一和粗略的自动增益控制级中调整低噪声放大器和混频器的增益。 在随后的精细增益控制周期期间，可编程增益放大器的增益分别针对由OFDM符号使用的每个频带进行调整，所述频带基于对其幅度在一定范围内的模数转换器的输出样本数进行计数的直方图单元 范围。 在每个OFDM符号之后更新粗和细增益。

    Frame synchronization
    3.
    发明申请
    Frame synchronization 有权
    帧同步

    公开(公告)号：US20070064744A1

    公开(公告)日：2007-03-22

    申请号：US11505624

    申请日：2006-08-16

    申请人： Turgut Aytur ,  Stephan Brink ,  Ravishankar Mahadevappa ,  Ran Yan

    发明人： Turgut Aytur ,  Stephan Brink ,  Ravishankar Mahadevappa ,  Ran Yan

    IPC分类号： H04J3/06

    CPC分类号： H04L27/2656 ,  H04L27/2675

    摘要： Frame synchronization methods and systems suited for packet communications systems, and particularly time frequency hopping packet communication systems, are disclosed. Frame synchronization is performed by performing a first correlation on information of received symbols and performing a second correlation on results of the first correlation. In systems with repeating synchronization information modulated by a cover sequence, the results of the second correlation may be used to determine symbol numbering of symbols in a packet.

    摘要翻译： 公开了适用于分组通信系统，特别是时间跳频分组通信系统的帧同步方法和系统。 通过对接收到的符号的信息执行第一相关并对第一相关的结果执行第二相关来执行帧同步。 在具有由覆盖序列调制的重复同步信息的系统中，第二相关的结果可用于确定分组中符号的符号编号。

    Packet detection
    4.
    发明申请
    Packet detection 有权
    数据包检测

    公开(公告)号：US20070055501A1

    公开(公告)日：2007-03-08

    申请号：US11506193

    申请日：2006-08-16

    申请人： Turgut Aytur ,  Stephan Brink ,  Ravishankar Mahadevappa ,  Ran Yan

    发明人： Turgut Aytur ,  Stephan Brink ,  Ravishankar Mahadevappa ,  Ran Yan

    IPC分类号： G10L19/00

    CPC分类号： H04L7/042 ,  H04B1/7183 ,  H04L27/2656 ,  H04L27/2675 ,  H04L27/2676 ,  H04W24/00

    摘要： An apparatus for and a method of performing packet detection in a receiver is provided. The apparatus is configured to determine a measure of a correlation between information of one or more received symbols and synchronization information. The apparatus is also configured to determine a measure of an energy value of one or more of the received symbols. The apparatus is also configured to determine if a packet has been detected based on the measure of the correlation and the measure of the energy value of the one or more received symbols.

    摘要翻译： 提供了一种用于在接收机中执行分组检​​测的装置和方法。 该装置被配置为确定一个或多个接收到的符号的信息与同步信息之间的相关性的度量。 该装置还被配置为确定一个或多个接收符号的能量值的度量。 该装置还被配置为基于相关性的测量和一个或多个接收符号的能量值的测量来确定是否已经检测到分组。

    Tone sensing and nulling in frequency-hopped multicarrier system
    6.
    发明申请
    Tone sensing and nulling in frequency-hopped multicarrier system 审中-公开
    跳频多载波系统中的音调感知和归零

    公开(公告)号：US20070058693A1

    公开(公告)日：2007-03-15

    申请号：US11494072

    申请日：2006-07-27

    申请人： Turgut Aytur ,  Stephan Brink ,  Ravishankar Mahadevappa ,  Ran Yan

    发明人： Turgut Aytur ,  Stephan Brink ,  Ravishankar Mahadevappa ,  Ran Yan

    IPC分类号： H04B1/00 ,  H04K1/10

    CPC分类号： H04L27/2626 ,  H04B1/713 ,  H04B1/715 ,  H04L5/0007 ,  H04L5/0062 ,  H04L25/0224 ,  H04L27/2602 ,  H04L27/2647

    摘要： A method and system for removing frequencies interfering with a UWB OFDM receiver from transmission frequencies of the UWB communication. A sensing mechanism is added to the receiver that develops an energy histogram for the frequencies in a received signal and develops a tone mask for masking the interfering frequencies. The tone mask is applied after a mapping stage in the transmitter of the UWB communication and removes the interfering frequencies from the transmitted signal. Various criteria based on energy averaging are used to identify and null and remove the interfering frequencies.

    摘要翻译： 一种用于从UWB通信的传输频率去除干扰UWB OFDM接收机的频率的方法和系统。 将感测机制添加到接收机中，以形成接收信号中的频率的能量直方图，并且形成用于掩蔽干扰频率的色调掩码。 在UWB通信的发射机中的映射阶段之后应用音调掩模，并从发送的信号中去除干扰频率。 使用基于能量平均的各种标准来识别和消除和消除干扰频率。

    Deinterleaver and dual-viterbi decoder architecture
    9.
    发明授权
    Deinterleaver and dual-viterbi decoder architecture 有权
    去交织器和双维特比解码器架构

    公开(公告)号：US07779338B2

    公开(公告)日：2010-08-17

    申请号：US11490844

    申请日：2006-07-21

    申请人： Mustafa Altintas ,  Turgut Aytur ,  Ravishankar H. Mahadevappa ,  Feng Shi ,  Stephan ten Brink ,  Ran Yan

    发明人： Mustafa Altintas ,  Turgut Aytur ,  Ravishankar H. Mahadevappa ,  Feng Shi ,  Stephan ten Brink ,  Ran Yan

    IPC分类号： H03M13/03

    CPC分类号： H03M13/41 ,  H03M13/27 ,  H03M13/6561 ,  H03M13/6566 ,  H04L1/0054 ,  H04L1/0059 ,  H04L1/0068 ,  H04L1/0071 ,  H04L1/06

    摘要： Pairs of parallel Viterbi decoders use windowed block data for decoding data at rates above 320 Mbps. Memory banks of the deinterleavers feeding the decoders operate such that some are receiving data while others are sending data to the decoders. Parallel input streams to every pair of decoders overlap for several traceback lengths of the decoder causing data input to a first decoder at the end of an input stream to be the same as the data input to a second decoder of the same pair at the beginning of an input stream. Then, the first decoder is able to post-synchronize its path metric with the second decoder and the second decoder is able to pre-synchronize its path metric with the first. Either, the deinterleaver data length is an integer multiple of the traceback length or the data input to only the first block of the first interleaver is padded.

    摘要翻译： 一对并行维特比解码器使用窗口块数据，以高于320 Mbps的速率解码数据。 供给解码器的解交织器的存储器操作，使得一些接收数据，而其他数据传送到解码器。 对于每对解码器的并行输入流与解码器的几个回溯长度重叠，导致在输入流结束时输入到第一解码器的数据输入与输入到相同对的第二解码器的数据相同 一个输入流。 然后，第一解码器能够与第二解码器后同步其路径度量，并且第二解码器能够将其路径度量与第一解码器预先同步。 或者，解交织器数据长度是回溯长度的整数倍，或仅填充第一交织器的第一块的数据输入。

    CHANNEL ESTIMATION
    10.
    发明申请
    CHANNEL ESTIMATION 有权
    频道估计

    公开(公告)号：US20070280366A1

    公开(公告)日：2007-12-06

    申请号：US11757247

    申请日：2007-06-01

    申请人： Turgut Aytur ,  Stephan ten Brink ,  Ravishankar H. Mahadevappa ,  Ran Yan

    发明人： Turgut Aytur ,  Stephan ten Brink ,  Ravishankar H. Mahadevappa ,  Ran Yan

    IPC分类号： H04K1/10

    CPC分类号： H04L25/0228 ,  H04L25/022 ,  H04L27/2647

    摘要： A receiver including a channel estimation function in which an initial channel estimate is filtered to increase receiver operation, particularly when the receiver may only have a limited number of channel estimation symbols with which to form the channel estimate. In some embodiments the filtering is performed by transforming the initial channel estimate to the time domain, zeroing some of the samples to filter the time domain channel estimate, and transforming the filtered time domain channel estimate to the frequency domain for use in channel compensation.

    摘要翻译： 一种包括信道估计功能的接收机，其中对初始信道估计进行滤波以增加接收机操作，特别是当接收机只能具有用于形成信道估计的有限数量的信道估计符号时。 在一些实施例中，通过将初始信道估计变换到时域来执行滤波，对某些采样进行归零以对时域信道估计进行滤波，并将经滤波的时域信道估计变换到频域以用于信道补偿。