公开(公告)号：US07256474B2

公开(公告)日：2007-08-14

申请号：US10777189

申请日：2004-02-13

申请人： Shigetoshi Wakayama ,  Mutsuaki Kai ,  Hiroyuki Kato ,  Masato Suga

发明人： Shigetoshi Wakayama ,  Mutsuaki Kai ,  Hiroyuki Kato ,  Masato Suga

IPC分类号： H01L23/544

CPC分类号： H01L23/564 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/00

摘要： A multilayer interconnection structure of a semiconductor device includes a first guard ring extending continuously along a periphery of a substrate and a second guard ring extending continuously in the multilayer interconnection structure along the periphery so as to be encircled by the first guard ring and so as to encircle an interconnection pattern inside the multilayer interconnection structure, wherein the first and second guard rings are connected with each other mechanically and continuously by a bridging conductor pattern extending continuously in a band form along a region including the first and second guard rings when viewed in the direction perpendicular to the substrate.

摘要翻译： 半导体器件的多层互连结构包括沿着衬底的周边连续延伸的第一保护环和沿着周边在多层互连结构中连续延伸的第二保护环，以便被第一保护环包围，从而 围绕所述多层互连结构内部的互连图案，其中所述第一和第二保护环通过桥接导体图案彼此机械连续地连接，所述桥接导体图案沿着包括所述第一和第二保护环的区域以带状连续延伸， 垂直于衬底的方向。

公开(公告)号：US06649428B2

公开(公告)日：2003-11-18

申请号：US10096512

申请日：2002-03-13

申请人： Mutsuaki Kai

发明人： Mutsuaki Kai

IPC分类号： H01L2166

CPC分类号： H01L25/0657 ,  H01L23/481 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2225/06541

摘要： Semiconductor chips mounted in a laminated manner on a substrate and a semiconductor integrated circuit device using the semiconductor chips. A predetermined semiconductor chip is selected by chip selection signals from an external unit despite the chips having the same wiring pattern are laminated in a plural number one upon the other. The semiconductor integrated circuit device is fabricated by using such semiconductor chips. The semiconductor chip comprises a plurality of first electrode terminals arranged on a front surface maintaining a predetermined pitch to receive reference signals for producing comparison signals that are to be compared with chip selection signals in a comparator circuit to select a chip, a plurality of second electrode terminals arranged on a back surface opposed to the front surface each being deviated by one pitch from the plurality of the first electrode terminals to output the reference signals input to the first electrode terminals, and connection portions for electrically connecting the first and second electrode terminals that are deviated by the one pitch.

摘要翻译： 以层叠方式安装在基板上的半导体芯片和使用半导体芯片的半导体集成电路器件。 通过来自外部单元的芯片选择信号来选择预定的半导体芯片，尽管具有相同布线图案的芯片彼此层叠多个。 通过使用这种半导体芯片制造半导体集成电路器件。 所述半导体芯片包括多个第一电极端子，所述多个第一电极端子布置在保持预定间距的前表面上以接收用于产生比较信号的参考信号，所述参考信号将在比较器电路中与芯片选择信号进行比较以选择芯片;多个第二电极 布置在与前表面相对的背表面上的端子各自从多个第一电极端子偏离一个间距，以输出输入到第一电极端子的参考信号，以及用于将第一和第二电极端子电连接的连接部分， 偏离了一个音调。

公开(公告)号：US07342434B2

公开(公告)日：2008-03-11

申请号：US11042090

申请日：2005-01-26

申请人： Shigetoshi Wakayama ,  Mutsuaki Kai

发明人： Shigetoshi Wakayama ,  Mutsuaki Kai

IPC分类号： G11C5/14

CPC分类号： H03F3/45183 ,  H03F1/52 ,  H03F1/523 ,  H03F3/45475

摘要： A capacitor has a MOS gate structure in which a gate insulating film is held between a gate terminal and a ground terminal as a dielectric. A switch unit is connected between the gate terminal and a power supply. The ground terminal is connected to a ground. A switch control circuit that switches a state of the switch unit between a conductive state and a nonconductive state is provided. A predetermined voltage and a voltage of the gate terminal are input to a non-inverting input terminal and an inverting input terminal of the switch control circuit, respectively. The switch unit is conductive when the voltage of the gate terminal is higher than the predetermined voltage, and nonconductive when the voltage of the gate terminal is lower than the predetermined voltage.

摘要翻译： 电容器具有MOS栅极结构，其中栅极绝缘膜保持在栅极端子和接地端子之间作为电介质。 开关单元连接在栅极端子和电源之间。 接地端子接地。 提供了一种在导通状态和非导通状态之间切换开关单元的状态的开关控制电路。 栅极端子的预定电压和电压分别输入到开关控制电路的非反相输入端子和反相输入端子。 当栅极端子的电压高于预定电压时，开关单元导通，并且当栅极端子的电压低于预定电压时，开关单元导通。

公开(公告)号：US20070257371A1

公开(公告)日：2007-11-08

申请号：US11822462

申请日：2007-07-06

申请人： Shigetoshi Wakayama ,  Mutsuaki Kai ,  Hiroyuki Kato ,  Masato Suga

发明人： Shigetoshi Wakayama ,  Mutsuaki Kai ,  Hiroyuki Kato ,  Masato Suga

IPC分类号： H01L23/52

CPC分类号： H01L23/564 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/00

摘要： A multilayer interconnection structure of a semiconductor device includes a first guard ring extending continuously along a periphery of a substrate and a second guard ring extending continuously in the multilayer interconnection structure along the periphery so as to be encircled by the first guard ring and so as to encircle an interconnection pattern inside the multilayer interconnection structure, wherein the first and second guard rings are connected with each other mechanically and continuously by a bridging conductor pattern extending continuously in a band form along a region including the first and second guard rings when viewed in the direction perpendicular to the substrate.

公开(公告)号：US20060061409A1

公开(公告)日：2006-03-23

申请号：US11042090

申请日：2005-01-26

申请人： Shigetoshi Wakayama ,  Mutsuaki Kai

发明人： Shigetoshi Wakayama ,  Mutsuaki Kai

IPC分类号： G11C5/14

CPC分类号： H03F3/45183 ,  H03F1/52 ,  H03F1/523 ,  H03F3/45475

摘要： A capacitor has a MOS gate structure in which a gate insulating film is held between a gate terminal and a ground terminal as a dielectric. A switch unit is connected between the gate terminal and a power supply. The ground terminal is connected to a ground. A switch control circuit that switches a state of the switch unit between a conductive state and a nonconductive state is provided. A predetermined voltage and a voltage of the gate terminal are input to a non-inverting input terminal and an inverting input terminal of the switch control circuit, respectively. The switch unit is conductive when the voltage of the gate terminal is higher than the predetermined voltage, and nonconductive when the voltage of the gate terminal is lower than the predetermined voltage.

摘要翻译： 电容器具有MOS栅极结构，其中栅极绝缘膜保持在栅极端子和接地端子之间作为电介质。 开关单元连接在栅极端子和电源之间。 接地端子接地。 提供了一种在导通状态和非导通状态之间切换开关单元的状态的开关控制电路。 栅极端子的预定电压和电压分别输入到开关控制电路的非反相输入端子和反相输入端子。 当栅极端子的电压高于预定电压时，开关单元导通，并且当栅极端子的电压低于预定电压时，开关单元导通。