SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20220293552A1

    公开(公告)日:2022-09-15

    申请号:US17198252

    申请日:2021-03-11

    摘要: The disclosure provides a method of manufacturing a semiconductor device including bonding a second device wafer to a first device wafer, such that a first bonding interface including a dielectric-to-dielectric bonding interface and a metal-to-metal bonding interface is formed between the first device wafer and the second device wafer, wherein the second device wafer is electrically coupled to the first device wafer, and a function of the first device wafer and the second device wafer are the same kind of device wafer. A semiconductor device is also provided.

    Semiconductor structure
    5.
    发明授权

    公开(公告)号:US12133378B2

    公开(公告)日:2024-10-29

    申请号:US17707977

    申请日:2022-03-30

    IPC分类号: H10B20/20

    CPC分类号: H10B20/20

    摘要: A semiconductor structure including a semiconductor substrate, an active area, a transistor gate, a fuse gate, a first dielectric pattern, a second dielectric pattern and a plurality of metal lines is provided. The active area is disposed in the semiconductor substrate. The transistor gate has a first line segment and a second line segment extending across the active area in a first direction. The fuse gate located between the first line segment and the second line segment extends across the active area in the first direction. The first dielectric pattern is disposed between the active area and the transistor gate. The second dielectric pattern is disposed between the active area and the fuse gate. The metal lines disposed on two opposite sides of the transistor gate are electrically connected to the active device.

    SEMICONDUCTOR STRUCTURE
    7.
    发明公开

    公开(公告)号:US20230320083A1

    公开(公告)日:2023-10-05

    申请号:US17707977

    申请日:2022-03-30

    IPC分类号: H01L27/112

    CPC分类号: H01L27/11206

    摘要: A semiconductor structure including a semiconductor substrate, an active area, a transistor gate, a fuse gate, a first dielectric pattern, a second dielectric pattern and a plurality of metal lines is provided. The active area is disposed in the semiconductor substrate. The transistor gate has a first line segment and a second line segment extending across the active area in a first direction. The fuse gate located between the first line segment and the second line segment extends across the active area in the first direction. The first dielectric pattern is disposed between the active area and the transistor gate. The second dielectric pattern is disposed between the active area and the fuse gate. The metal lines disposed on two opposite sides of the transistor gate are electrically connected to the active device.