公开(公告)号：US20210296526A1

公开(公告)日：2021-09-23

申请号：US17338446

申请日：2021-06-03

Applicant: NICHIA CORPORATION

Inventor： Shun KITAHAMA ,  Yoshiki INOUE ,  Kazuhiro NAGAMINE ,  Junya NARITA

IPC: H01L33/00 ,  H01L33/44 ,  H01L33/38 ,  H01L33/14 ,  H01L33/32

Abstract: A light emitting element includes: a semiconductor structure including: a substrate, an n-side nitride semiconductor layer located on the substrate, and a p-side nitride semiconductor layer located on the n-side nitride semiconductor layer, wherein a p-side nitride semiconductor side of the semiconductor structure is a light extraction face side, and an n-side nitride semiconductor side of the semiconductor structure is a mounting face side; a first protective layer located on and in direct contact with an upper face of the p-side nitride semiconductor layer in a region corresponding to the peripheral portion of the p-side nitride semiconductor layer; and a current diffusion layer located on and in direct contact with an upper face of the p-side nitride semiconductor layer in a region corresponding to the area inside of the peripheral portion. The current diffusion layer does not overlap the first protective layer in a top view.

公开(公告)号：US20200075797A1

公开(公告)日：2020-03-05

申请号：US16677287

申请日：2019-11-07

Applicant: NICHIA CORPORATION

Inventor： Shun KITAHAMA ,  Yoshiki INOUE ,  Kazuhiro NAGAMINE ,  Junya NARITA

IPC: H01L33/00 ,  H01L33/44 ,  H01L33/38 ,  H01L33/14 ,  H01L33/32

Abstract: A light emitting element includes: a semiconductor structure including: a substrate, an n-side nitride semiconductor layer containing an n-type impurity and located on the substrate, and a p-side nitride semiconductor layer containing a p-type impurity and located on the n-side nitride semiconductor layer, wherein a resistance of a peripheral portion of the p-side nitride semiconductor layer is higher than a resistance of an area inside of the peripheral portion in a top view, wherein a p-side nitride semiconductor side of the semiconductor structure is a light extraction face side, and an n-side nitride semiconductor side of the semiconductor structure is a mounting face side; and first protective layer located on an upper face of the p-side nitride semiconductor layer in a region corresponding to the peripheral portion of the p-side nitride semiconductor layer.

公开(公告)号：US20240079517A1

公开(公告)日：2024-03-07

申请号：US18507177

申请日：2023-11-13

Applicant: NICHIA CORPORATION

Inventor： Shun KITAHAMA ,  Yoshiki INOUE ,  Kazuhiro NAGAMINE ,  Junya NARITA

IPC: H01L33/00 ,  H01L33/14 ,  H01L33/32 ,  H01L33/38 ,  H01L33/44

CPC classification number: H01L33/0095 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/145 ,  H01L33/32 ,  H01L33/382 ,  H01L33/44 ,  H01L21/268

Abstract: A light emitting element includes: a semiconductor structure including: a substrate, an n-side nitride semiconductor layer located on the substrate, and a p-side nitride semiconductor layer located on the n-side nitride semiconductor layer, wherein a p-side nitride semiconductor side of the semiconductor structure is a light extraction face side, and an n-side nitride semiconductor side of the semiconductor structure is a mounting face side; a first protective layer located on and in direct contact with an upper face of the p-side nitride semiconductor layer in a region corresponding to the peripheral portion of the p-side nitride semiconductor layer; and a current diffusion layer located on and in direct contact with an upper face of the p-side nitride semiconductor layer in a region corresponding to the area inside of the peripheral portion. The current diffusion layer does not overlap the first protective layer in a top view.

公开(公告)号：US20180287009A1

公开(公告)日：2018-10-04

申请号：US15941402

申请日：2018-03-30

Applicant: NICHIA CORPORATION

Inventor： Kazuhiro NAGAMINE ,  Yoshiki INOUE ,  Susumu TOKO ,  Junya NARITA

IPC: H01L33/00 ,  H01L33/32 ,  H01L33/44 ,  H01L33/42

Abstract: A method of manufacturing a plurality of light emitting elements, the method includes: providing a semiconductor wafer; dividing the p-side nitride semiconductor layer into a plurality of demarcated element regions; forming a protective layer on regions including an outer periphery of an upper surface of the p-side nitride semiconductor layer of each of the plurality of demarcated element regions and exposed side surfaces in the semiconductor structure that are formed by the selectively removing the portion of the p-side nitride semiconductor layer; reducing a resistance of regions of the p-side nitride semiconductor layer; and dividing the semiconductor wafer into a plurality of light emitting elements.

公开(公告)号：US20180175238A1

公开(公告)日：2018-06-21

申请号：US15842655

申请日：2017-12-14

Applicant: NICHIA CORPORATION

Inventor： Shun KITAHAMA ,  Yoshiki INOUE ,  Kazuhiro NAGAMINE ,  Junya NARITA

IPC: H01L33/00 ,  H01L33/44 ,  H01L33/38

CPC classification number: H01L33/0095 ,  H01L21/268 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/145 ,  H01L33/22 ,  H01L33/32 ,  H01L33/382 ,  H01L33/44 ,  H01L2933/0025

Abstract: A method for manufacturing a plurality of light emitting elements includes: providing a semiconductor wafer comprising: a substrate, an n-side nitride semiconductor layer containing an n-type impurity and located on the substrate, and a p-side nitride semiconductor layer containing a p-type impurity and located on the n-side nitride semiconductor layer; forming a protective layer on an upper face of the p-side nitride semiconductor layer in regions that include borders of areas to become the plurality of light emitting elements; reducing a resistance of the p-side nitride semiconductor in areas where no protective layer has been formed by annealing the semiconductor wafer; irradiating a laser beam on the substrate so as to form modified regions in the substrate; and obtaining a plurality of light emitting elements by dividing the semiconductor wafer in which the modified regions have been formed in the substrate.