公开(公告)号：US3582725A

公开(公告)日：1971-06-01

申请号：US3582725D

申请日：1969-08-21

Applicant: NIPPON ELECTRIC CO

Inventor： MATUKURA YASUO ,  NAKANUMA SHO ,  WADA TOSHIO

IPC: H01L21/74 ,  H01L21/761 ,  H01L21/82 ,  H01L5/00 ,  H01L7/02

CPC classification number: H01L21/82 ,  H01L21/74 ,  H01L21/761 ,  Y10S148/037 ,  Y10S148/085 ,  Y10S148/151 ,  Y10S257/918

Abstract: According to the present invention, there is provided a semiconductor integrated circuit device comprising a semiconductor substrate of a first conductivity type; two opposite conductivity type buried layer regions, both with high impurity concentration but with different outward diffusion speeds, formed within said substrate, the region with the faster speed surrounding the other; and epitaxial layer of the first conductivity type epitaxially grown over said substrate allowing the impurities of said buried layer regions to outwardly diffuse thereinto; a diffusion region of the second conductivity type formed by diffusing second conductivity type impurities from the surface of said epitaxial layer in alignment with the buried layer of the higher outward diffusion speed; and isolated region of the higher outward diffusion speed; an isolated region of the first conductivity type thereby simultaneously formed on the surface of the buried layer of lower outward diffusion speed and surrounded by the diffusion region; an isolation region comprised of part of the epitaxial layer also simultaneously formed on the substrate surrounding the diffusion regions, and finally, metal wiring film attached to each of the regions. The two regions of the buried layer may be formed by using different impurities or by using different concentrations of the same impurity.