SEMICONDUCTOR DEVICE, POWER MODULE AND MANUFACTURING METHOD FOR THE SEMICONDUCTOR DEVICE

    公开(公告)号:US20230253512A1

    公开(公告)日:2023-08-10

    申请号:US18301793

    申请日:2023-04-17

    CPC classification number: H01L29/945 H01L29/66181 H01L28/91 H01L25/074

    Abstract: A method for manufacturing a semiconductor device includes forming a trench on a first main surface of a conductive semiconductor substrate. The method includes laminating conductive layers, each of which is a first or a second conductive layer, along a surface normal direction of a side surface of the trench, while forming dielectric layers between a conductive layer closest to the side surface of the trench and the side surface of the trench, and between the corresponding conductive layers; and removing the first conductive layer and the dielectric layer, which are formed on a bottom portion of the trench, to electrically connect the second conductive layer to the semiconductor substrate at the bottom portion of the trench. After a portion of the first main surface, the portion being outside of the trench, is covered with an insulating protective film, the first conductive layer and the dielectric layer are removed.

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

    公开(公告)号:US20210313466A1

    公开(公告)日:2021-10-07

    申请号:US17262001

    申请日:2018-07-27

    Abstract: A semiconductor device includes: a substrate; a semiconductor layer disposed on a main surface of the substrate; and a first main electrode and a second main electrode, which are disposed on the substrate separately from each other with the semiconductor layer sandwiched therebetween and are individually end portions of a current path of a main current flowing in an on-state. The semiconductor layer includes: a first conductivity-type drift region through which a main current flows; a second conductivity-type column region that is disposed inside the drift region and extends in parallel to a current path; and an electric field relaxation region that is disposed in at least a part between the drift region and the column region and is either a low-concentration region in which an impurity concentration is lower than in the same conductivity-type adjacent region or a non-doped region.

    SEMICONDUCTOR DEVICE, POWER MODULE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE

    公开(公告)号:US20210296308A1

    公开(公告)日:2021-09-23

    申请号:US17263617

    申请日:2018-08-01

    Abstract: A semiconductor device includes: a conductive semiconductor substrate in which a trench is formed on the first main surface; a plurality of conductive layers, each of which is either a first conductive layer or a second conductive layer, which are laminated on one another along a surface normal direction of a side surface of the trench; and dielectric layers arranged between a conductive layer closest to the side surface of the trench among the plurality of conductive layers and the side surface of the trench, and between the plurality of corresponding conductive layers. The first conductive layer is electrically insulated from the semiconductor substrate, and the semiconductor substrate that electrically connects to the second conductive layer inside the trench electrically connects to the second electrode.

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME

    公开(公告)号:US20210367070A1

    公开(公告)日:2021-11-25

    申请号:US17040631

    申请日:2018-03-26

    Abstract: A semiconductor device includes: a substrate having a groove formed on a main surface; a drift region of a first conductivity type, the drift region having a portion disposed at a bottom part; a well region of a second conductivity type, the well region being disposed in one sidewall to be connected to the drift region; a first semiconductor region of the first conductivity type, the first semiconductor region being disposed on a surface of the well region in the sidewall to be away from the drift region; a second semiconductor region of the first conductivity type, the second semiconductor region being disposed to be opposed to the well region via the drift region; and a gate electrode opposed to the well region, the gate electrode being disposed in a gate trench that has an opening extending over the upper surfaces of the well region and the first semiconductor region.

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