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公开(公告)号:US20230188447A1
公开(公告)日:2023-06-15
申请号:US17548438
申请日:2021-12-10
Applicant: NOKIA SOLUTIONS AND NETWORKS OY
Inventor: Brian Alleyne , Matias Cavuoti , Li-Chuan Egan , Mimi Dannhardt , Krishnan Subramani , Mohamed Abdul Malick Mohamed Usman , Roxanna Ganji , Stephen Russell
IPC: H04L43/0882 , H04L43/0811 , H04L43/0817 , H04L43/0894 , H04L47/122
CPC classification number: H04L43/0882 , H04L43/0811 , H04L43/0817 , H04L43/0894 , H04L47/122
Abstract: Systems and methods for protecting external memory resources to prevent bandwidth collapse in a network processor. One embodiment is a network processor including an input port configured to receive packets from a source device, on-chip memory configured to store packets in queues, an external memory interface configured to couple the on-chip memory with an external memory providing a backing store to the on-chip memory, and bandwidth monitor configured to measure a bandwidth utilization of the external memory. The network processor also includes a processor configured to apply the bandwidth utilization of the external memory to a congestion notification profile, to generate one or more congestion notifications based on the bandwidth utilization applied to the congestion notification profile, and to send the one or more congestion notifications to the source device to request decreasing packet rate for decreasing the bandwidth utilization of the external memory.
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公开(公告)号:US20230188467A1
公开(公告)日:2023-06-15
申请号:US17548451
申请日:2021-12-10
Applicant: NOKIA SOLUTIONS AND NETWORKS OY
Inventor: Brian Alleyne , Matias Cavuoti , Li-Chuan Egan , Mimi Dannhardt , Krishnan Subramani , Mohamed Abdul Malick Mohamed Usman , Roxanna Ganji , Stephen Russell
IPC: H04L47/122 , H04L47/32 , H04L47/52 , H04L47/10
CPC classification number: H04L47/122 , H04L47/29 , H04L47/326 , H04L47/521
Abstract: Systems and methods for protecting external memory resources to prevent bandwidth collapse in a network processor. One embodiment is a network processor including an input port configured to receive packets from a source device, on-chip memory configured to store packets in queues, and external memory configured to provide a backing store to the on-chip memory. The network processor also includes a processor configured, in response to determining that the source device is unresponsive to a congestion notification, to reduce a size of one or more queues to prevent packets transferring from the on-chip memory to the external memory.
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公开(公告)号:US12126513B2
公开(公告)日:2024-10-22
申请号:US17548438
申请日:2021-12-10
Applicant: NOKIA SOLUTIONS AND NETWORKS OY
Inventor: Brian Alleyne , Matias Cavuoti , Li-Chuan Egan , Mimi Dannhardt , Krishnan Subramani , Mohamed Abdul Malick Mohamed Usman , Roxanna Ganji , Stephen Russell
IPC: H04L43/0882 , H04L43/0811 , H04L43/0817 , H04L43/0876 , H04L43/0894 , H04L47/12 , H04L47/122
CPC classification number: H04L43/0882 , H04L43/0811 , H04L43/0817 , H04L43/0876 , H04L43/0894 , H04L47/12 , H04L47/122
Abstract: Systems and methods for protecting external memory resources to prevent bandwidth collapse in a network processor. One embodiment is a network processor including an input port configured to receive packets from a source device, on-chip memory configured to store packets in queues, an external memory interface configured to couple the on-chip memory with an external memory providing a backing store to the on-chip memory, and bandwidth monitor configured to measure a bandwidth utilization of the external memory. The network processor also includes a processor configured to apply the bandwidth utilization of the external memory to a congestion notification profile, to generate one or more congestion notifications based on the bandwidth utilization applied to the congestion notification profile, and to send the one or more congestion notifications to the source device to request decreasing packet rate for decreasing the bandwidth utilization of the external memory.
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公开(公告)号:US11895029B2
公开(公告)日:2024-02-06
申请号:US17548451
申请日:2021-12-10
Applicant: NOKIA SOLUTIONS AND NETWORKS OY
Inventor: Brian Alleyne , Matias Cavuoti , Li-Chuan Egan , Mimi Dannhardt , Krishnan Subramani , Mohamed Abdul Malick Mohamed Usman , Roxanna Ganji , Stephen Russell
IPC: H04L47/00 , H04L47/122 , H04L47/10 , H04L47/52 , H04L47/32
CPC classification number: H04L47/122 , H04L47/29 , H04L47/326 , H04L47/521
Abstract: Systems and methods for protecting external memory resources to prevent bandwidth collapse in a network processor. One embodiment is a network processor including an input port configured to receive packets from a source device, on-chip memory configured to store packets in queues, and external memory configured to provide a backing store to the on-chip memory. The network processor also includes a processor configured, in response to determining that the source device is unresponsive to a congestion notification, to reduce a size of one or more queues to prevent packets transferring from the on-chip memory to the external memory.
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