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公开(公告)号:US09774067B2
公开(公告)日:2017-09-26
申请号:US14708838
申请日:2015-05-11
Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
Inventor: Benjamin D. Poust , Michael Conrad Battung , Dino Ferizovic , Patty P. Chang-Chien
CPC classification number: H01P1/14 , H01L23/60 , H01L2924/0002 , H01T4/08 , H01T4/16 , H01T19/04 , H03G11/002 , H03G11/004 , H01L2924/00
Abstract: A plasma power limiter fabricated using wafer-level fabrication techniques with other circuit elements. The power limiter includes a signal substrate having a first side and a second side, an input signal line formed on the first side, a signal transmission line formed on the second side and an output signal line formed on the first side. The power limiter also includes a ground substrate having a first side and a second side, and being bonded to the signal substrate to form a sealed cavity including an ionizable gas therebetween. The ground substrate includes a ground metal layer formed on the second side. A signal propagating on the input signal line at a power level greater than a threshold power level generates a voltage potential across the cavity that ionizes the gas and generates a plasma discharge, and limits power of the output signal coupled to the output signal line.