公开(公告)号：US08587353B2

公开(公告)日：2013-11-19

申请号：US13681405

申请日：2012-11-19

Applicant: NOVATEK Microelectronics Corp.

Inventor： Tung-Cheng Hsin ,  Hsiang-Chih Chen

IPC: H03L7/06

CPC classification number: H03L7/085 ,  H03L7/081 ,  H03L7/1974 ,  H03L7/23

Abstract: The present invention discloses a frequency synthesizer. The frequency synthesizer includes a delay unit, for receiving a reference signal and delaying the reference signal according to a delay parameter, so as to generate a delay reference signal; a phase-locked loop, for generating an output signal according to the delay reference signal and a feedback frequency dividing signal; a control unit, for generating the delay parameter and a frequency dividing parameter according to a target magnification factor; and a frequency divider, for dividing the frequency of the output signal according to the frequency dividing parameter.

Abstract translation: 本发明公开了一种频率合成器。 频率合成器包括延迟单元，用于接收参考信号并根据延迟参数延迟参考信号，以产生延迟参考信号; 锁相环，用于根据所述延迟参考信号和反馈分频信号产生输出信号; 控制单元，用于根据目标放大系数产生延迟参数和分频参数; 以及分频器，用于根据分频参数分频输出信号的频率。

公开(公告)号：US20130257496A1

公开(公告)日：2013-10-03

申请号：US13681405

申请日：2012-11-19

Applicant: NOVATEK MICROELECTRONICS CORP.

Inventor： Tung-Cheng Hsin ,  Hsiang-Chih Chen

IPC: H03L7/085

CPC classification number: H03L7/085 ,  H03L7/081 ,  H03L7/1974 ,  H03L7/23

Abstract: The present invention discloses a frequency synthesizer. The frequency synthesizer includes a delay unit, for receiving a reference signal and delaying the reference signal according to a delay parameter, so as to generate a delay reference signal; a phase-locked loop, for generating an output signal according to the delay reference signal and a feedback frequency dividing signal; a control unit, for generating the delay parameter and a frequency dividing parameter according to a target magnification factor; and a frequency divider, for dividing the frequency of the output signal according to the frequency dividing parameter.

Abstract translation: 本发明公开了一种频率合成器。 频率合成器包括延迟单元，用于接收参考信号并根据延迟参数延迟参考信号，以产生延迟参考信号; 锁相环，用于根据所述延迟参考信号和反馈分频信号产生输出信号; 控制单元，用于根据目标放大系数产生延迟参数和分频参数; 以及分频器，用于根据分频参数分频输出信号的频率。

公开(公告)号：US12125457B2

公开(公告)日：2024-10-22

申请号：US17539214

申请日：2021-12-01

Applicant: NOVATEK Microelectronics Corp.

Inventor： Wen-Chi Lin ,  Li-Wei Chen ,  Hsiang-Chih Chen ,  Pao-Yen Lin ,  Cheng-Wei Sung ,  Chung-Wen Hung

IPC: G09G5/00 ,  G09G5/12 ,  H04N21/4363

CPC classification number: G09G5/005 ,  G09G5/006 ,  G09G5/12 ,  H04N21/4363

Abstract: A signal processing circuit, complying with DisplayPort standard and operated in a display device which is as a DisplayPort sink device, includes a main physical circuit, which is configured to receive a first signal from one of a plurality of DisplayPort connectors of the display device connected to a first DisplayPort source device and a plurality of auxiliary physical circuits. Only a first auxiliary physical circuit of the plurality of auxiliary physical circuits is enabled to receive a second signal from the DisplayPort connector connected to the first DisplayPort source device.

公开(公告)号：US20220180838A1

公开(公告)日：2022-06-09

申请号：US17539214

申请日：2021-12-01

Applicant: NOVATEK Microelectronics Corp.

Inventor： Wen-Chi Lin ,  Li-Wei Chen ,  Hsiang-Chih Chen ,  Pao-Yen Lin ,  Cheng-Wei Sung ,  Chung-Wen Hung

IPC: G09G5/00 ,  G09G5/12 ,  H04N21/4363

Abstract: A signal processing circuit, complying with DisplayPort standard and operated in a display device which is as a DisplayPort sink device, includes a main physical circuit, which is configured to receive a first signal from one of a plurality of DisplayPort connectors of the display device connected to a first DisplayPort source device and a plurality of auxiliary physical circuits. Only a first auxiliary physical circuit of the plurality of auxiliary physical circuits is enabled to receive a second signal from the DisplayPort connector connected to the first DisplayPort source device.