公开(公告)号：US10217183B2

公开(公告)日：2019-02-26

申请号：US14137818

申请日：2013-12-20

Applicant: NVIDIA Corporation

Inventor： Gregory S. Palmer ,  Jerome F. Duluk, Jr. ,  Karim Maher Abdalla ,  Jonathon S. Evans ,  Adam Clark Weitkemper ,  Lacky Vasant Shah ,  Philip Browning Johnson ,  Gentaro Hirota

IPC: G06T1/20 ,  G06F9/50

Abstract: A system, method, and computer program product are provided for allocating processor resources to process compute workloads and graphics workloads substantially simultaneously. The method includes the steps of allocating a plurality of processing units to process tasks associated with a graphics pipeline, receiving a request to allocate at least one processing unit in the plurality of processing units to process tasks associated with a compute pipeline, and reallocating the at least one processing unit to process tasks associated with the compute pipeline.

公开(公告)号：US10180916B2

公开(公告)日：2019-01-15

申请号：US14958714

申请日：2015-12-03

Applicant: Nvidia Corporation

Inventor： M. Wasiur Rashid ,  Gary Ward ,  Wei-Je Robert Huang ,  Philip Browning Johnson

IPC: G06F9/46 ,  G06F13/00

Abstract: A copy subsystem within a processor includes a set of logical copy engines and a set of physical copy engines. Each logical copy engine corresponds to a different command stream implemented by a device driver, and each logical copy engine is configured to receive copy commands via the corresponding command stream. When a logical copy engine receives a copy command, the logical copy engine distributes the command, or one or more subcommands derived from the command, to one or more of the physical copy engines. The physical copy engines can perform multiple copy operations in parallel with one another, thereby allowing the bandwidth of the communication link(s) to be saturated.

公开(公告)号：US20150178879A1

公开(公告)日：2015-06-25

申请号：US14137818

申请日：2013-12-20

Applicant: NVIDIA CORPORATION

Inventor： Gregory S. Palmer ,  Jerome F. Duluk, JR. ,  Karim Maher Abdalla ,  Jonathon S. Evans ,  Adam Clark Weitkemper ,  Lacky Vasant Shah ,  Philip Browning Johnson ,  Gentaro Hirota

IPC: G06T1/20 ,  G06F9/38

CPC classification number: G06T1/20 ,  G06F9/505

Abstract: A system, method, and computer program product are provided for allocating processor resources to process compute workloads and graphics workloads substantially simultaneously. The method includes the steps of allocating a plurality of processing units to process tasks associated with a graphics pipeline, receiving a request to allocate at least one processing unit in the plurality of processing units to process tasks associated with a compute pipeline, and reallocating the at least one processing unit to process tasks associated with the compute pipeline.

Abstract translation: 提供了一种系统，方法和计算机程序产品，用于分配处理器资源以基本同时处理计算工作负载和图形工作负载。 该方法包括以下步骤：分配多个处理单元以处理与图形流水线相关联的任务，接收分配多个处理单元中的至少一个处理单元以处理与计算流水线相关联的任务的请求，以及重新分配在 至少一个处理单元来处理与计算流水线相关联的任务。

公开(公告)号：US10430356B2

公开(公告)日：2019-10-01

申请号：US15582459

申请日：2017-04-28

Applicant: NVIDIA Corporation

Inventor： M. Wasiur Rashid ,  Jonathon Evans ,  Gary Ward ,  Philip Browning Johnson

IPC: G06F3/06 ,  G06F13/28 ,  G06F12/109 ,  G06F13/40

Abstract: Embodiments of the present invention set forth techniques for resolving page faults associated with a copy engine. A copy engine within a parallel processor receives a copy operation that includes a set of copy commands. The copy engine executes a first copy command included in the set of copy commands that results in a page fault. The copy engine stores the set of copy commands to the memory. At least one advantage of the disclosed techniques is that the copy engine can perform copy operations that involve source and destination memory pages that are not pinned, leading to reduced memory demand and greater flexibility.

公开(公告)号：US10275275B2

公开(公告)日：2019-04-30

申请号：US14958719

申请日：2015-12-03

Applicant: Nvidia Corporation

Inventor： M. Wasiur Rashid ,  Gary Ward ,  Wei-Je Robert Huang ,  Philip Browning Johnson

IPC: G06F9/46 ,  G06F9/48 ,  G06F9/52

Abstract: A copy subsystem within a processor includes a set of logical copy engines and a set of physical copy engines. Each logical copy engine corresponds to a different command stream implemented by a device driver, and each logical copy engine is configured to receive copy commands via the corresponding command stream. When a logical copy engine receives a copy command, the logical copy engine distributes the command, or one or more subcommands derived from the command, to one or more of the physical copy engines. The physical copy engines can perform multiple copy operations in parallel with one another, thereby allowing the bandwidth of the communication link(s) to be saturated.

公开(公告)号：US20180314431A1

公开(公告)日：2018-11-01

申请号：US15582459

申请日：2017-04-28

Applicant: NVIDIA Corporation

Inventor： M. Wasiur Rashid ,  Jonathon EVANS ,  Gary Ward ,  Philip Browning Johnson

IPC: G06F3/06

CPC classification number: G06F13/28 ,  G06F12/109 ,  G06F13/4022 ,  G06F2212/1041

Abstract: Embodiments of the present invention set forth techniques for resolving page faults associated with a copy engine. A copy engine within a parallel processor receives a copy operation that includes a set of copy commands. The copy engine executes a first copy command included in the set of copy commands that results in a page fault. The copy engine stores the set of copy commands to the memory. At least one advantage of the disclosed techniques is that the copy engine can perform copy operations that involve source and destination memory pages that are not pinned, leading to reduced memory demand and greater flexibility.

公开(公告)号：US10423424B2

公开(公告)日：2019-09-24

申请号：US13631685

申请日：2012-09-28

Applicant: NVIDIA Corporation

Inventor： Lincoln G. Garlick ,  Philip Browning Johnson ,  Rafal Zboinski ,  Jeff Tuckey ,  Samuel H. Duncan ,  Peter C. Mills

IPC: G06F9/38

Abstract: Techniques are disclosed for performing an auxiliary operation via a compute engine associated with a host computing device. The method includes determining that the auxiliary operation is directed to the compute engine, and determining that the auxiliary operation is associated with a first context comprising a first set of state parameters. The method further includes determining a first subset of state parameters related to the auxiliary operation based on the first set of state parameters. The method further includes transmitting the first subset of state parameters to the compute engine, and transmitting the auxiliary operation to the compute engine. One advantage of the disclosed technique is that surface area and power consumption are reduced within the processor by utilizing copy engines that have no context switching capability.

公开(公告)号：US20170161100A1

公开(公告)日：2017-06-08

申请号：US14958719

申请日：2015-12-03

Applicant: Nvidia Corporation

Inventor： M. Wasiur Rashid ,  Gary Ward ,  Wei-Je Robert Huang ,  Philip Browning Johnson

IPC: G06F9/48 ,  G06F9/52

CPC classification number: G06F9/4843 ,  G06F9/522 ,  G06F13/12

Abstract: A copy subsystem within a processor includes a set of logical copy engines and a set of physical copy engines. Each logical copy engine corresponds to a different command stream implemented by a device driver, and each logical copy engine is configured to receive copy commands via the corresponding command stream. When a logical copy engine receives a copy command, the logical copy engine distributes the command, or one or more subcommands derived from the command, to one or more of the physical copy engines. The physical copy engines can perform multiple copy operations in parallel with one another, thereby allowing the bandwidth of the communication link(s) to be saturated.

公开(公告)号：US20170161099A1

公开(公告)日：2017-06-08

申请号：US14958714

申请日：2015-12-03

Applicant: Nvidia Corporation

Inventor： M. Wasiur Rashid ,  Gary Ward ,  Wei-Je Robert Huang ,  Philip Browning Johnson

IPC: G06F9/48

CPC classification number: G06F13/12

Abstract: A copy subsystem within a processor includes a set of logical copy engines and a set of physical copy engines. Each logical copy engine corresponds to a different command stream implemented by a device driver, and each logical copy engine is configured to receive copy commands via the corresponding command stream. When a logical copy engine receives a copy command, the logical copy engine distributes the command, or one or more subcommands derived from the command, to one or more of the physical copy engines. The physical copy engines can perform multiple copy operations in parallel with one another, thereby allowing the bandwidth of the communication link(s) to be saturated.

公开(公告)号：US09639494B2

公开(公告)日：2017-05-02

申请号：US14070147

申请日：2013-11-01

Applicant: NVIDIA CORPORATION

Inventor： Jesse Max Guss ,  Philip Browning Johnson ,  Chris Marriott ,  Wojciech Jan Truty

IPC: G06F13/20 ,  G06F11/22 ,  G06F13/40 ,  H01H85/04

CPC classification number: G06F13/4072 ,  G06F11/22 ,  H01H85/04

Abstract: One embodiment of the present invention includes a hard-coded first device ID. The embodiment also includes a set of fuses that represents a second device ID. The hard-coded device ID and the set of fuses each designate a separate device ID for the device, and each device ID corresponds to a specific operating configuration of the device. The embodiment also includes selection logic to select between the hardcoded device ID and the set of fuses to set the device ID for the device. One advantage of the disclosed embodiments is providing flexibility for engineers who develop the devices while also reducing the likelihood that a third party can counterfeit the device.