公开(公告)号：US20140229953A1

公开(公告)日：2014-08-14

申请号：US13766595

申请日：2013-02-13

Applicant: NVIDIA CORPORATION

Inventor： Igor Sevastiyanov ,  Brian Matthew Fahs ,  Nicholas Wang ,  Scott Ricketts ,  Luke David Durant ,  Brian Scott Pharris

IPC: G06F9/48

CPC classification number: G06F9/4881 ,  G06F2209/484

Abstract: A system, method, and computer program product for management of dynamic task-dependency graphs. The method includes the steps of generating a first task data structure in a memory for a first task, generating a second task data structure in the memory, storing a pointer to the second task data structure in a first output dependence field of the first task data structure, setting a reference counter field of the second task data structure to a threshold value that indicates a number of dependent events associated with the second task, and launching the second task when the reference counter field stores a particular value. The second task data structure is a placeholder for a second task that is dependent on the first task.

Abstract translation: 一种用于管理动态任务依赖图的系统，方法和计算机程序产品。 该方法包括以下步骤：在用于第一任务的存储器中生成第一任务数据结构，在存储器中生成第二任务数据结构，在第一任务数据的第一输出依赖字段中存储指向第二任务数据结构的指针 将第二任务数据结构的参考计数器字段设置为指示与第二任务相关联的依赖事件的数量的阈值，以及当参考计数器字段存储特定值时启动第二任务。 第二任务数据结构是依赖于第一任务的第二任务的占位符。

公开(公告)号：US20150026652A1

公开(公告)日：2015-01-22

申请号：US13945829

申请日：2013-07-18

Applicant: NVIDIA Corporation

Inventor： Brian Scott Pharris ,  Saad Iqbal Godil

IPC: G06F17/50

CPC classification number: G06F17/5022

Abstract: A system, method, and computer program product for correlating transaction within a simulation of a hardware platform for post-simulation debugging is disclosed. The method includes the steps of initializing state information associated with a hardware simulation for a register-transfer level model representing a digital circuit design, executing the hardware simulation to generate a simulation output, generating one or more transaction objects based on the signals in the simulation output, and correlating a first transaction object of the one or more transaction objects with a second transaction object of the one or more transaction objects based on a set of rules and a state model.

Abstract translation: 公开了一种用于在用于后仿真调试的硬件平台的仿真中关联交易的系统，方法和计算机程序产品。 该方法包括以下步骤：初始化与表示数字电路设计的寄存器传送级模型的硬件仿真相关联的状态信息，执行硬件仿真以生成模拟输出，基于模拟中的信号生成一个或多个交易对象 输出，并且基于一组规则和状态模型将所述一个或多个事务对象的第一事务对象与所述一个或多个事务对象的第二事务对象相关联。

公开(公告)号：US20140337389A1

公开(公告)日：2014-11-13

申请号：US13890184

申请日：2013-05-08

Applicant: NVIDIA CORPORATION

Inventor： Scott Ricketts ,  Luke David Durant ,  Brian Scott Pharris ,  Igor Sevastiyanov ,  Nicholas Wang

IPC: G06F17/30

CPC classification number: G06F17/30292 ,  G06F9/4881 ,  G06F9/52 ,  G06F17/30289 ,  G06F2209/484

Abstract: A system, method, and computer program product for scheduling tasks associated with continuation thread blocks. The method includes the steps of generating a first task metadata data structure in a memory, generating a second task metadata data structure in the memory, executing a first task corresponding to the first task metadata data structure in a processor, generating state information representing a continuation task related to the first task and storing the state information in the second task metadata data structure, executing the continuation task in the processor after the one or more child tasks have finished execution, and indicating that the first task has logically finished execution once the continuation task has finished execution. The second task metadata data structure is related to the first task metadata data structure, and at least one instruction in the first task causes one or more child tasks to be executed by the processor.

Abstract translation: 一种用于调度与连续线程块相关联的任务的系统，方法和计算机程序产品。 该方法包括以下步骤：在存储器中生成第一任务元数据数据结构，在存储器中生成第二任务元数据数据结构，在处理器中执行与第一任务元数据结构对应的第一任务，生成表示连续的状态信息 与所述第一任务相关的任务并将所述状态信息存储在所述第二任务元数据数据结构中，在所述一个或多个子任务完成执行之后在所述处理器中执行所述继续任务，并且一旦所述连续性指示所述第一任务已经逻辑地完成执行 任务已完成执行。 第二任务元数据数据结构与第一任务元数据数据结构相关，并且第一任务中的至少一个指令导致处理器执行一个或多个子任务。

公开(公告)号：US20240303203A1

公开(公告)日：2024-09-12

申请号：US18180008

申请日：2023-03-07

Applicant: NVIDIA Corporation

Inventor： Noam Dor Korem ,  Brian Scott Pharris ,  Jacob Subag

IPC: G06F12/126 ,  G06N3/0464

CPC classification number: G06F12/126 ,  G06N3/0464

Abstract: Apparatuses, systems, and techniques to manage a cache located on a processor of a computing system using eviction priority based on based on memory reuse. Memory addresses associated with a workload of an application executing using the processor are identified. An amount of reuse of the memory addresses corresponding to the workload is determined. A cache management policy for the workload is determined based on the amount of reuse. The cache management policy is applied to the cache.

公开(公告)号：US20140337569A1

公开(公告)日：2014-11-13

申请号：US13890178

申请日：2013-05-08

Applicant: NVIDIA CORPORATION

Inventor： Scott Ricketts ,  Brian Scott Pharris ,  Nicholas Wang ,  Luke David Durant ,  Philip Alexander Cuadra ,  Jerome F. Duluk, Jr.

IPC: G06F12/08 ,  G11C11/406

CPC classification number: G06F12/0804 ,  G06F9/4843 ,  G06F12/0802

Abstract: A system, method, and computer program product for low-latency scheduling and launch of memory defined tasks. The method includes the steps of receiving a task metadata data structure to be stored in a memory associated with a processor, transmitting the task metadata data structure to a scheduling unit of the processor, storing the task metadata data structure in a cache unit included in the scheduling unit, and copying the task metadata data structure from the cache unit to the memory.

Abstract translation: 一种用于低延迟调度和启动内存定义任务的系统，方法和计算机程序产品。 该方法包括以下步骤：接收要存储在与处理器相关联的存储器中的任务元数据数据结构，将任务元数据结构发送到处理器的调度单元，将任务元数据结构存储在包括在该处理器中的高速缓存单元中 调度单元，以及将任务元数据结构从高速缓存单元复制到存储器。

公开(公告)号：US09378139B2

公开(公告)日：2016-06-28

申请号：US13890178

申请日：2013-05-08

Applicant: NVIDIA Corporation

Inventor： Scott Ricketts ,  Brian Scott Pharris ,  Nicholas Wang ,  Luke David Durant ,  Philip Alexander Cuadra ,  Jerome F. Duluk, Jr.

IPC: G06F12/02 ,  G06F12/08 ,  G06F9/48

CPC classification number: G06F12/0804 ,  G06F9/4843 ,  G06F12/0802

Abstract: A system, method, and computer program product for low-latency scheduling and launch of memory defined tasks. The method includes the steps of receiving a task metadata data structure to be stored in a memory associated with a processor, transmitting the task metadata data structure to a scheduling unit of the processor, storing the task metadata data structure in a cache unit included in the scheduling unit, and copying the task metadata data structure from the cache unit to the memory.

Abstract translation: 一种用于低延迟调度和启动内存定义任务的系统，方法和计算机程序产品。 该方法包括以下步骤：接收要存储在与处理器相关联的存储器中的任务元数据数据结构，将任务元数据结构发送到处理器的调度单元，将任务元数据结构存储在包括在该处理器中的高速缓存单元中 调度单元，以及将任务元数据结构从高速缓存单元复制到存储器。

公开(公告)号：US09286119B2

公开(公告)日：2016-03-15

申请号：US13766595

申请日：2013-02-13

Applicant: NVIDIA Corporation

Inventor： Igor Sevastiyanov ,  Brian Matthew Fahs ,  Nicholas Wang ,  Scott Ricketts ,  Luke David Durant ,  Brian Scott Pharris

IPC: G06F9/46 ,  G06F9/48

CPC classification number: G06F9/4881 ,  G06F2209/484

Abstract: A system, method, and computer program product for management of dynamic task-dependency graphs. The method includes the steps of generating a first task data structure in a memory for a first task, generating a second task data structure in the memory, storing a pointer to the second task data structure in a first output dependence field of the first task data structure, setting a reference counter field of the second task data structure to a threshold value that indicates a number of dependent events associated with the second task, and launching the second task when the reference counter field stores a particular value. The second task data structure is a placeholder for a second task that is dependent on the first task.

Abstract translation: 一种用于管理动态任务依赖图的系统，方法和计算机程序产品。 该方法包括以下步骤：在用于第一任务的存储器中生成第一任务数据结构，在存储器中生成第二任务数据结构，在第一任务数据的第一输出依赖字段中存储指向第二任务数据结构的指针 将第二任务数据结构的参考计数器字段设置为指示与第二任务相关联的依赖事件的数量的阈值，以及当参考计数器字段存储特定值时启动第二任务。 第二任务数据结构是依赖于第一任务的第二任务的占位符。

公开(公告)号：US09256623B2

公开(公告)日：2016-02-09

申请号：US13890184

申请日：2013-05-08

Applicant: NVIDIA Corporation

Inventor： Scott Ricketts ,  Luke David Durant ,  Brian Scott Pharris ,  Igor Sevastiyanov ,  Nicholas Wang

IPC: G06F9/46 ,  G06F7/00 ,  G06F17/30 ,  G06F9/52

CPC classification number: G06F17/30292 ,  G06F9/4881 ,  G06F9/52 ,  G06F17/30289 ,  G06F2209/484

Abstract: A system, method, and computer program product for scheduling tasks associated with continuation thread blocks. The method includes the steps of generating a first task metadata data structure in a memory, generating a second task metadata data structure in the memory, executing a first task corresponding to the first task metadata data structure in a processor, generating state information representing a continuation task related to the first task and storing the state information in the second task metadata data structure, executing the continuation task in the processor after the one or more child tasks have finished execution, and indicating that the first task has logically finished execution once the continuation task has finished execution. The second task metadata data structure is related to the first task metadata data structure, and at least one instruction in the first task causes one or more child tasks to be executed by the processor.

Abstract translation: 一种用于调度与连续线程块相关联的任务的系统，方法和计算机程序产品。 该方法包括以下步骤：在存储器中生成第一任务元数据数据结构，在存储器中生成第二任务元数据数据结构，在处理器中执行与第一任务元数据结构对应的第一任务，生成表示连续的状态信息 与所述第一任务相关的任务并将所述状态信息存储在所述第二任务元数据数据结构中，在所述一个或多个子任务完成执行之后在所述处理器中执行所述继续任务，并且一旦所述连续性指示所述第一任务已经逻辑地完成执行 任务已完成执行。 第二任务元数据数据结构与第一任务元数据数据结构相关，并且第一任务中的至少一个指令导致处理器执行一个或多个子任务。