公开(公告)号：US20240272943A1

公开(公告)日：2024-08-15

申请号：US18637207

申请日：2024-04-16

Applicant: NVIDIA Corporation

Inventor： Ashutosh Tadkase ,  Akash Bellubbi ,  Ian Tramble ,  Peter Boonstoppel ,  Suraj Das ,  Ranvijay Singh ,  Sever Topan ,  Albert Davies ,  Linda Xiong ,  Sharat Janapareddy ,  Ashkan Vafaee ,  Sai Gurrappadi ,  Pulkit Desai ,  John Lore ,  Michael Cox ,  Ian Howson

IPC: G06F9/48 ,  G06F9/30 ,  G06F9/38 ,  G06F9/50 ,  G06F9/54 ,  G06F11/07 ,  G06F21/52

CPC classification number: G06F9/4881 ,  G06F9/30087 ,  G06F9/3836 ,  G06F9/485 ,  G06F9/5055 ,  G06F9/5083 ,  G06F9/544 ,  G06F11/0721 ,  G06F11/0757 ,  G06F21/52 ,  G06F2221/2151

Abstract: One or more embodiments of the present disclosure relate to executing, by a plurality of compute engines, a plurality of runnables of a computing application based at least on an execution schedule and a set of commands associated with the execution schedule. The execution schedule may be generated using a compiling system to include the set of commands. The set of commands may include one or more individual commands corresponding to one or more timing fences dictating a timing and order of execution of one or more individual runnables of the plurality of runnables.

公开(公告)号：US20240296068A1

公开(公告)日：2024-09-05

申请号：US18657540

申请日：2024-05-07

Applicant: NVIDIA Corporation

Inventor： Ashutosh Tadkase ,  Ian Tramble ,  Akash Bellubbi ,  Suraj Das ,  Ranvijay Singh ,  Linda Xiong ,  John Lore ,  Albert Davies ,  Ian Howson ,  Peter Boonstoppel ,  Sai Gurrappadi ,  Pulkit Desai ,  Sever Topan ,  Sharat Janapareddy ,  Ashkan Vafaee ,  Michael Cox

IPC: G06F9/48 ,  G06F9/30 ,  G06F9/38 ,  G06F9/50 ,  G06F9/54 ,  G06F11/07 ,  G06F21/52

CPC classification number: G06F9/4881 ,  G06F9/30087 ,  G06F9/3836 ,  G06F9/485 ,  G06F9/5055 ,  G06F9/5083 ,  G06F9/544 ,  G06F11/0721 ,  G06F11/0757 ,  G06F21/52 ,  G06F2221/2151

Abstract: One or more embodiments of the present disclosure relate to switching between execution schedules related to execution of tasks, or runnables, by multiple compute engines. The execution schedules includes respective sets of commands that dictate timing and order of execution, by the compute engines, of tasks, or runnables, corresponding to computing applications.

公开(公告)号：US20230096502A1

公开(公告)日：2023-03-30

申请号：US17929674

申请日：2022-09-02

Applicant: NVIDIA Corporation

Inventor： Ashutosh Tadkase ,  Akash Bellubbi ,  Ian Tramble ,  Peter Boonstoppel ,  Suraj Das ,  Ranvijay Singh ,  Sever Topan ,  Albert Davies ,  Linda Xiong ,  Sharat Janapareddy ,  Ashkan Vafaee ,  Sai Gurrappadi ,  Bruce Holmer ,  Vishanth Iyer ,  John Lore ,  Ian Howson ,  Pulkit Desai ,  Michael Cox

IPC: G06F9/48 ,  G06F9/30 ,  G06F9/54

Abstract: One or more embodiments of the present disclosure relate to executing, by a plurality of compute engines, a plurality of runnables of a computing application based at least on an execution schedule and a set of commands associated with the execution schedule. The execution schedule may be generated using a compiling system to include the set of commands. The set of commands may include one or more individual commands corresponding to one or more timing fences dictating a timing and order of execution of one or more individual runnables of the plurality of runnables.