公开(公告)号：US20200050451A1

公开(公告)日：2020-02-13

申请号：US16101247

申请日：2018-08-10

Applicant: NVIDIA Corporation

Inventor： Ronald Babich ,  John BURGESS ,  Jack CHOQUETTE ,  Tero KARRAS ,  Samuli LAINE ,  Ignacio LLAMAS ,  Gregory MUTHLER ,  William Parsons NEWHALL, JR.

IPC: G06F9/30 ,  G06F9/38 ,  G06F9/48 ,  G06T1/20 ,  G06T1/60

Abstract: Systems and methods for an efficient and robust multiprocessor-coprocessor interface that may be used between a streaming multiprocessor and an acceleration coprocessor in a GPU are provided. According to an example implementation, in order to perform an acceleration of a particular operation using the coprocessor, the multiprocessor: issues a series of write instructions to write input data for the operation into coprocessor-accessible storage locations, issues an operation instruction to cause the coprocessor to execute the particular operation; and then issues a series of read instructions to read result data of the operation from coprocessor-accessible storage locations to multiprocessor-accessible storage locations.